Age | Commit message (Expand) | Author | Files | Lines |
---|---|---|---|---|
2018-03-12 | clk: tegra: Mark HCLK, SCLK and EMC as critical | 1 | -3/+5 | |
2017-11-01 | clk: tegra: Mark APB clock as critical | 1 | -1/+1 | |
2017-08-23 | clk: tegra: Re-factor T210 PLLX registration | 1 | -2/+9 | |
2016-02-02 | clk: tegra: super: Fix sparse warnings for functions not declared as static | 1 | -3/+3 | |
2015-12-17 | clk: tegra: Add Super Gen5 Logic | 1 | -13/+129 | |
2015-08-25 | Merge tag 'tegra-for-4.3-clk' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into clk-next | 1 | -1/+3 | |
2015-07-20 | clk: tegra: Properly include clk.h | 1 | -1/+0 | |
2015-07-16 | clk: tegra: Add the DFLL as a possible parent of the cclk_g clock | 1 | -1/+3 | |
2014-02-17 | clk: tegra: cclk_lp has a pllx/2 divider | 1 | -1/+1 | |
2013-11-26 | clk: tegra: introduce common gen4 super clock | 1 | -0/+149 |