Age | Commit message (Expand) | Author | Files | Lines |
2019-06-05 | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 282 | ![](https://seccdn.libravatar.org/avatar/655933b9bf9ea16efc37f6cf1438efaa?s=13&d=retro) Thomas Gleixner | 1 | -9/+1 |
2019-05-30 | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 201 | ![](https://seccdn.libravatar.org/avatar/655933b9bf9ea16efc37f6cf1438efaa?s=13&d=retro) Thomas Gleixner | 20 | -240/+20 |
2019-05-30 | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 174 | ![](https://seccdn.libravatar.org/avatar/655933b9bf9ea16efc37f6cf1438efaa?s=13&d=retro) Thomas Gleixner | 5 | -49/+5 |
2019-05-21 | treewide: Add SPDX license identifier - Makefile/Kconfig | ![](https://seccdn.libravatar.org/avatar/655933b9bf9ea16efc37f6cf1438efaa?s=13&d=retro) Thomas Gleixner | 1 | -0/+1 |
2019-05-15 | clk: Remove io.h from clk-provider.h | ![](https://seccdn.libravatar.org/avatar/8c6b7eae8dbc6e6ed2f41596b1254753?s=13&d=retro) Stephen Boyd | 4 | -0/+4 |
2019-05-07 | Merge branches 'clk-stm32f4', 'clk-tegra', 'clk-at91', 'clk-sifive-fu540' and 'clk-spdx' into clk-next | ![](https://seccdn.libravatar.org/avatar/8c6b7eae8dbc6e6ed2f41596b1254753?s=13&d=retro) Stephen Boyd | 4 | -40/+77 |
2019-05-07 | Merge branches 'clk-sa', 'clk-aspeed', 'clk-samsung', 'clk-ingenic' and 'clk-zynq' into clk-next | ![](https://seccdn.libravatar.org/avatar/8c6b7eae8dbc6e6ed2f41596b1254753?s=13&d=retro) Stephen Boyd | 1 | -1/+1 |
2019-04-25 | clk: tegra: divider: Mark Memory Controller clock as read-only | ![](https://seccdn.libravatar.org/avatar/38f8ab512cdd3849b7df36e9ddcfb0db?s=13&d=retro) Dmitry Osipenko | 1 | -1/+2 |
2019-04-25 | clk: tegra: emc: Replace BUG() with WARN_ONCE() | ![](https://seccdn.libravatar.org/avatar/38f8ab512cdd3849b7df36e9ddcfb0db?s=13&d=retro) Dmitry Osipenko | 1 | -1/+4 |
2019-04-25 | clk: tegra: emc: Fix EMC max-rate clamping | ![](https://seccdn.libravatar.org/avatar/38f8ab512cdd3849b7df36e9ddcfb0db?s=13&d=retro) Dmitry Osipenko | 1 | -7/+10 |
2019-04-25 | clk: tegra: emc: Support multiple RAM codes | ![](https://seccdn.libravatar.org/avatar/38f8ab512cdd3849b7df36e9ddcfb0db?s=13&d=retro) Dmitry Osipenko | 1 | -14/+23 |
2019-04-25 | clk: tegra: emc: Don't enable EMC clock manually | ![](https://seccdn.libravatar.org/avatar/38f8ab512cdd3849b7df36e9ddcfb0db?s=13&d=retro) Dmitry Osipenko | 1 | -2/+0 |
2019-04-25 | clk: tegra124: Remove lock-enable bit from PLLM | ![](https://seccdn.libravatar.org/avatar/38f8ab512cdd3849b7df36e9ddcfb0db?s=13&d=retro) Dmitry Osipenko | 1 | -2/+1 |
2019-04-25 | clk: tegra: Fix PLLM programming on Tegra124+ when PMC overrides divider | ![](https://seccdn.libravatar.org/avatar/38f8ab512cdd3849b7df36e9ddcfb0db?s=13&d=retro) Dmitry Osipenko | 1 | -2/+2 |
2019-04-23 | clk: core: replace clk_{readl,writel} with {readl,writel} | ![](https://seccdn.libravatar.org/avatar/3e26f7b386b9fd19e2cbc98ffb0a6fef?s=13&d=retro) Jonas Gorski | 2 | -5/+5 |
2019-04-19 | clk: tegra: Don't enable already enabled PLLs | ![](https://seccdn.libravatar.org/avatar/38f8ab512cdd3849b7df36e9ddcfb0db?s=13&d=retro) Dmitry Osipenko | 1 | -13/+37 |
2019-04-11 | clk: tegra: Make tegra_clk_super_mux_ops static | ![](https://seccdn.libravatar.org/avatar/99fadc7a66f85bd5c0262cb31d311d89?s=13&d=retro) YueHaibing | 1 | -1/+1 |
2019-03-14 | Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux | ![](https://seccdn.libravatar.org/avatar/fb47627bc8c0bcdb36321edfbf02e916?s=13&d=retro) Linus Torvalds | 1 | -9/+9 |
2019-03-08 | Merge branches 'clk-qcom-msm8998', 'clk-fractional-parent', 'clk-x86-mv' and 'clk-SA-fixes' into clk-next | ![](https://seccdn.libravatar.org/avatar/8c6b7eae8dbc6e6ed2f41596b1254753?s=13&d=retro) Stephen Boyd | 1 | -9/+9 |
2019-02-22 | clk: tegra: dfll: Fix debugfs_simple_attr.cocci warnings | ![](https://seccdn.libravatar.org/avatar/99fadc7a66f85bd5c0262cb31d311d89?s=13&d=retro) YueHaibing | 1 | -9/+9 |
2019-02-18 | clk: tegra: dfll: Make symbol 'tegra210_cpu_cvb_tables' static | ![](https://seccdn.libravatar.org/avatar/ceba43c85d4097c271d526e797b33911?s=13&d=retro) Wei Yongjun | 1 | -1/+1 |
2019-02-15 | Merge tag 'tegra-for-5.1-clk' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/drivers | ![](https://seccdn.libravatar.org/avatar/f1897d8cf2fe6c8e75a0c9add2d05b0c?s=13&d=retro) Arnd Bergmann | 7 | -98/+913 |
2019-02-06 | clk: tegra: dfll: build clk-dfll.c for Tegra124 and Tegra210 | ![](https://seccdn.libravatar.org/avatar/255692fc72913bbf4e64ea605327c822?s=13&d=retro) Peter De Schrijver | 2 | -1/+6 |
2019-02-06 | clk: tegra: dfll: add CVB tables for Tegra210 | ![](https://seccdn.libravatar.org/avatar/d723f45badf79e6c63076882b6db9a4f?s=13&d=retro) Joseph Lo | 2 | -0/+427 |
2019-02-06 | clk: tegra: dfll: round down voltages based on alignment | ![](https://seccdn.libravatar.org/avatar/d723f45badf79e6c63076882b6db9a4f?s=13&d=retro) Joseph Lo | 1 | -8/+13 |
2019-02-06 | clk: tegra: dfll: support PWM regulator control | ![](https://seccdn.libravatar.org/avatar/d723f45badf79e6c63076882b6db9a4f?s=13&d=retro) Joseph Lo | 1 | -67/+377 |
2019-02-06 | clk: tegra: dfll: CVB calculation alignment with the regulator | ![](https://seccdn.libravatar.org/avatar/d723f45badf79e6c63076882b6db9a4f?s=13&d=retro) Joseph Lo | 4 | -14/+59 |
2019-02-06 | clk: tegra: dfll: registration for multiple SoCs | ![](https://seccdn.libravatar.org/avatar/255692fc72913bbf4e64ea605327c822?s=13&d=retro) Peter De Schrijver | 1 | -11/+34 |
2019-01-09 | clk: tegra: dfll: Fix a potential Oop in remove() | ![](https://seccdn.libravatar.org/avatar/85ff6b2aa66ef9f0bf35105783fd2ae2?s=13&d=retro) Dan Carpenter | 1 | -1/+3 |
2018-12-14 | Merge branches 'clk-renesas', 'clk-allwinner', 'clk-tegra', 'clk-meson' and 'clk-rockchip' into clk-next | ![](https://seccdn.libravatar.org/avatar/8c6b7eae8dbc6e6ed2f41596b1254753?s=13&d=retro) Stephen Boyd | 10 | -32/+80 |
2018-12-14 | clk: tegra: Return the exact clock rate from clk_round_rate | ![](https://seccdn.libravatar.org/avatar/6c37b418826347ea4216b068fa97649e?s=13&d=retro) Robert Yang | 1 | -3/+4 |
2018-12-14 | clk: tegra30: Use Tegra CPU powergate helper function | ![](https://seccdn.libravatar.org/avatar/888d04fd6b3cdbcf55f91a3f94aa5471?s=13&d=retro) Jon Hunter | 1 | -3/+3 |
2018-12-14 | clk: tegra: Fix maximum audio sync clock for Tegra124/210 | ![](https://seccdn.libravatar.org/avatar/888d04fd6b3cdbcf55f91a3f94aa5471?s=13&d=retro) Jon Hunter | 7 | -13/+37 |
2018-12-14 | clk: tegra: get rid of duplicate defines | ![](https://seccdn.libravatar.org/avatar/4ab181c51cee57f9aa62a078e7dc78f4?s=13&d=retro) Marcel Ziswiler | 1 | -3/+0 |
2018-11-28 | clk: tegra: Change to use DEFINE_SHOW_ATTRIBUTE macro | ![](https://seccdn.libravatar.org/avatar/c43d9d5e9716df36ca95157271612efb?s=13&d=retro) Yangtao Li | 1 | -11/+1 |
2018-11-08 | clk: tegra20: Check whether direct PLLM sourcing is turned off for EMC | ![](https://seccdn.libravatar.org/avatar/38f8ab512cdd3849b7df36e9ddcfb0db?s=13&d=retro) Dmitry Osipenko | 1 | -0/+10 |
2018-11-08 | clk: tegra20: Turn EMC clock gate into divider | ![](https://seccdn.libravatar.org/avatar/38f8ab512cdd3849b7df36e9ddcfb0db?s=13&d=retro) Dmitry Osipenko | 1 | -10/+26 |
2018-10-16 | clk: tegra210: Include size.h for compilation ease | ![](https://seccdn.libravatar.org/avatar/8c6b7eae8dbc6e6ed2f41596b1254753?s=13&d=retro) Stephen Boyd | 1 | -0/+1 |
2018-10-16 | clk: tegra: Fixes for MBIST work around | ![](https://seccdn.libravatar.org/avatar/d723f45badf79e6c63076882b6db9a4f?s=13&d=retro) Joseph Lo | 1 | -3/+3 |
2018-10-16 | clk: tegra: probe deferral error reporting | ![](https://seccdn.libravatar.org/avatar/4ab181c51cee57f9aa62a078e7dc78f4?s=13&d=retro) Marcel Ziswiler | 1 | -2/+6 |
2018-08-14 | Merge branches 'clk-imx6-ocram', 'clk-missing-put', 'clk-tegra-sdmmc-jitter', 'clk-allwinner' and 'clk-uniphier' into clk-next | ![](https://seccdn.libravatar.org/avatar/8c6b7eae8dbc6e6ed2f41596b1254753?s=13&d=retro) Stephen Boyd | 8 | -40/+343 |
2018-08-14 | Merge branches 'clk-imx-critical', 'clk-tegra-bpmp', 'clk-tegra-124', 'clk-tegra-critical' and 'clk-tegra-emc-oob' into clk-next | ![](https://seccdn.libravatar.org/avatar/8c6b7eae8dbc6e6ed2f41596b1254753?s=13&d=retro) Stephen Boyd | 4 | -7/+15 |
2018-07-25 | clk: tegra: make sdmmc2 and sdmmc4 as sdmmc clocks | ![](https://seccdn.libravatar.org/avatar/255692fc72913bbf4e64ea605327c822?s=13&d=retro) Peter De-Schrijver | 3 | -15/+12 |
2018-07-25 | clk: tegra: Add sdmmc mux divider clock | ![](https://seccdn.libravatar.org/avatar/255692fc72913bbf4e64ea605327c822?s=13&d=retro) Peter De-Schrijver | 3 | -0/+278 |
2018-07-25 | clk: tegra: Refactor fractional divider calculation | ![](https://seccdn.libravatar.org/avatar/255692fc72913bbf4e64ea605327c822?s=13&d=retro) Peter De Schrijver | 4 | -25/+52 |
2018-07-25 | clk: tegra: Fix includes required by fence_udelay() | ![](https://seccdn.libravatar.org/avatar/28aebcbca58ef758bb4cb99eb1445197?s=13&d=retro) Aapo Vienamo | 1 | -0/+1 |
2018-07-08 | clk: tegra: emc: Avoid out-of-bounds bug | ![](https://seccdn.libravatar.org/avatar/38f8ab512cdd3849b7df36e9ddcfb0db?s=13&d=retro) Dmitry Osipenko | 1 | -1/+1 |
2018-07-08 | clk: tegra: Mark Memory Controller clock as critical | ![](https://seccdn.libravatar.org/avatar/38f8ab512cdd3849b7df36e9ddcfb0db?s=13&d=retro) Dmitry Osipenko | 1 | -2/+3 |
2018-07-08 | clk: tegra: Make vde a child of pll_c3 | ![](https://seccdn.libravatar.org/avatar/03bddb20d4030f1f862c9d4a07956621?s=13&d=retro) Thierry Reding | 1 | -1/+1 |
2018-07-08 | clk: tegra: Make vic03 a child of pll_c3 | ![](https://seccdn.libravatar.org/avatar/03bddb20d4030f1f862c9d4a07956621?s=13&d=retro) Thierry Reding | 1 | -0/+1 |