linux-dev - Linux kernel development work

Age	Commit message (Expand)	Author	Files	Lines
2015-09-16	clk: tegra: dfll: Properly protect OPP list	Thierry Reding	1	-1/+7
2015-08-25	clk: tegra: Fix some static checker problems	Stephen Boyd	2	-7/+9
2015-08-25	Merge tag 'tegra-for-4.3-clk' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into clk-next	Stephen Boyd	10	-9/+2304
2015-08-24	clk: Convert __clk_get_name(hw->clk) to clk_hw_get_name(hw)	Stephen Boyd	1	-4/+4
2015-08-24	clk: tegra: Convert to clk_hw based provider APIs	Stephen Boyd	2	-10/+10
2015-07-28	Merge branch 'cleanup-clk-h-includes' into clk-next	Stephen Boyd	16	-16/+2
2015-07-27	clk: change clk_ops' ->determine_rate() prototype	Boris Brezillon	1	-13/+15
2015-07-20	clk: tegra: Properly include clk.h	Stephen Boyd	16	-16/+2
2015-07-16	clk: tegra: Add the DFLL as a possible parent of the cclk_g clock	Tuomas Tynkkynen	1	-1/+3
2015-07-16	clk: tegra: Save/restore CCLKG_BURST_POLICY on suspend	Tuomas Tynkkynen	1	-0/+14
2015-07-16	clk: tegra: Add Tegra124 DFLL clocksource platform driver	Tuomas Tynkkynen	4	-4/+172
2015-07-16	clk: tegra: Add DFLL DVCO reset control for Tegra124	Paul Walmsley	1	-0/+68
2015-07-16	clk: tegra: Introduce ability for SoC-specific reset control callbacks	Mikko Perttunen	2	-8/+34
2015-07-16	clk: tegra: Add functions for parsing CVB tables	Tuomas Tynkkynen	2	-0/+207
2015-07-16	clk: tegra: Add closed loop support for the DFLL	Tuomas Tynkkynen	1	-3/+663
2015-07-16	clk: tegra: Add library for the DFLL clock source (open-loop mode)	Tuomas Tynkkynen	3	-0/+1150
2015-05-13	clk: tegra: Fix hda2codec_2x clock name for Tegra30	Marcel Ziswiler	1	-1/+1
2015-05-13	clk: tegra: EMC clock driver depends on EMC driver	Thierry Reding	3	-1/+14
2015-05-13	clk: tegra: Have EMC clock implement determine_rate()	Tomeu Vizoso	1	-12/+23
2015-05-13	clk: tegra: Set the EMC clock as the parent of the MC clock	Tomeu Vizoso	1	-12/+1
2015-05-13	clk: tegra: Add EMC clock driver	Mikko Perttunen	4	-2/+535
2015-05-13	clk: tegra: Remove old Tegra124 EMC clock	Mikko Perttunen	1	-1/+0
2015-04-10	clk: tegra: Use the proper parent for plld_dsi	Thierry Reding	1	-6/+8
2015-04-10	clk: tegra: Use generic tegra_osc_clk_init() on Tegra114	Thierry Reding	1	-31/+3
2015-04-10	clk: tegra: Model oscillator as clock	Thierry Reding	4	-17/+21
2015-04-10	clk: tegra: Add peripheral registers for bank Y	Thierry Reding	1	-0/+14
2015-04-10	clk: tegra: Register the proper number of resets	Thierry Reding	1	-1/+1
2015-04-10	clk: tegra: Remove needless initializations	Thierry Reding	1	-3/+3
2015-04-10	clk: tegra: Use consistent indentation	Thierry Reding	1	-10/+10
2015-04-10	clk: tegra: Various whitespace cleanups	Thierry Reding	2	-1/+2
2015-04-10	clk: tegra: Enable HDA to HDMI clocks on Tegra124	Dylan Reid	1	-0/+5
2015-04-10	clk: tegra: Fix a bunch of sparse warnings	Thierry Reding	1	-1/+1
2015-04-10	clk: tegra: Fix typo tabel -> table	Thierry Reding	1	-1/+1
2015-02-18	clk: Replace explicit clk assignment with __clk_hw_set_clk	Javier Martinez Canillas	1	-7/+7
2015-02-02	clk: tegra: Define PLLD_DSI and remove dsia(b)_mux	Mark Zhang	4	-26/+24
2015-02-02	clk: tegra: Add support for the Tegra132 CAR IP block	Paul Walmsley	3	-12/+129
2015-02-02	clk: tegra: make tegra_clocks_apply_init_table() arch_initcall	Peter De Schrijver	1	-2/+5
2015-02-02	clk: tegra: Fix order of arguments in WARN	Tomeu Vizoso	1	-4/+4
2015-02-02	clk: tegra124: Add init data for dsi lp clocks	Sean Paul	1	-0/+2
2015-02-02	clk: tegra: SDMMC controllers are on APB	Andrew Bresticker	1	-8/+8
2014-11-26	clk: tegra: Implement memory-controller clock	Thierry Reding	6	-4/+40
2014-09-18	clk: tegra: Make clock initialization more robust	Tomeu Vizoso	1	-2/+7
2014-09-18	clk: tegra124: Add PLL_M_UD and PLL_C_UD clocks	Mikko Perttunen	1	-0/+8
2014-08-08	Merge tag 'cleanup-for-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc	Linus Torvalds	3	-3/+8
2014-07-17	ARM: tegra: Convert PMC to a driver	Thierry Reding	1	-1/+1
2014-07-17	ARM: tegra: Move includes to include/soc/tegra	Thierry Reding	3	-3/+8
2014-07-08	clk: tegra: Use XUSB-compatible SATA PLL sequence	Mikko Perttunen	1	-0/+11
2014-06-30	clk: tegra: export clock names for debugging	Peter De Schrijver	1	-0/+6
2014-06-27	clk: tegra124: init table updates	Peter De Schrijver	1	-0/+6
2014-06-25	clk: tegra: Add SATA clocks to Tegra124 initialization table	Mikko Perttunen	1	-0/+2