Age | Commit message (Expand) | Author | Files | Lines |
---|---|---|---|---|
2017-03-08 | clk: ti: convert to use proper register definition for all accesses | 1 | -40/+21 | |
2016-04-15 | clk: ti: dflt: remove redundant unlikely | 1 | -1/+1 | |
2015-10-02 | clk: ti: dflt: fix enable_reg validity check | 1 | -2/+2 | |
2015-08-24 | clk: Convert __clk_get_name(hw->clk) to clk_hw_get_name(hw) | 1 | -4/+4 | |
2015-06-02 | clk: ti: dflt: move support for default gate clock to clock driver | 1 | -0/+316 |