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path: root/drivers/clk (follow)
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2017-09-10Merge tag 'armsoc-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-socLinus Torvalds4-210/+21
2017-08-30clk: sunxi-ng: Provide a default reset hookMaxime Ripard1-0/+12
2017-08-30clk: sunxi-ng: a83t: Support new timing mode for mmc2 clockChen-Yu Tsai1-8/+2
2017-08-30clk: sunxi-ng: Add MP_MMC clocks that support MMC timing modes switchingChen-Yu Tsai2-0/+110
2017-08-30clk: sunxi-ng: Add interface to query or configure MMC timing modes.Chen-Yu Tsai3-0/+75
2017-08-22Merge tag 'v4.13-rc4' into v4.14/dt64Kevin Hilman9-33/+90
2017-08-04clk: meson: gxbb: Add sd_emmc clk0 clkidsJerome Brunet1-2/+8
2017-08-04clk: meson-gxbb: expose almost every clock in the bindingsJerome Brunet1-110/+7
2017-08-04clk: meson8b: expose every clock in the bindingsJerome Brunet1-99/+4
2017-08-04clk: meson: gxbb: fix protection against undefined clksJerome Brunet1-0/+2
2017-08-04clk: meson: meson8b: fix protection against undefined clksJerome Brunet1-0/+1
2017-08-02clk: keystone: sci-clk: Fix sci_clk_getTero Kristo1-24/+42
2017-08-02Merge tag 'sunxi-clk-fixes-for-4.13' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into clk-fixesStephen Boyd1-1/+1
2017-08-02Merge tag 'meson-clk-fixes-for-4.13-rc4-v2' of git://github.com/baylibre/clk-meson into clk-fixesStephen Boyd4-0/+18
2017-08-01clk: meson: mpll: fix mpll0 fractional part ignoredJerome Brunet4-0/+18
2017-07-31clk: samsung: exynos5420: The EPLL rate table correctionsSylwester Nawrocki1-8/+8
2017-07-24clk: sunxi-ng: sun5i: Add clk_set_rate_parent to the CPU clockMaxime Ripard1-1/+1
2017-07-18clk: x86: Do not gate clocks enabled by the firmwareCarlo Caione1-0/+7
2017-07-17clk: gemini: Fix reset regressionLinus Walleij1-0/+14
2017-07-15Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linusLinus Torvalds5-0/+115
2017-07-11clk: boston: Add a driver for MIPS Boston board clocksPaul Burton5-0/+115
2017-06-29clk: gemini: Read status before using the valueJoel Stanley1-0/+1
2017-06-29clk: scpi: error when clock fails to registerJerome Brunet1-3/+5
2017-06-29clk: at91: Add sama5d2 suspend/resumeAlexandre Belloni4-1/+140
2017-06-22clk: keystone: TI_SCI_PROTOCOL is needed for clk driverArnd Bergmann1-1/+2
2017-06-22clk: samsung: audss: Fix silent hang on Exynos4412 due to disabled EPLLKrzysztof Kozlowski1-0/+1
2017-06-21clk: uniphier: provide NAND controller clock rateMasahiro Yamada1-4/+11
2017-06-21clk: hisilicon: add usb2 clocks for hi3798cv200 SoCJiancheng Xue1-0/+21
2017-06-21clk: Add Gemini SoC clock controllerLinus Walleij3-0/+464
2017-06-21clk: iproc: Remove __init marking on iproc_pll_clk_setup()Stephen Boyd1-6/+6
2017-06-19clk: bcm: Add clocks for Stingray SOCSandeep Tripathy3-0/+336
2017-06-19clk: mediatek: export cpu multiplexer clock for MT8173 SoCsSean Wang1-0/+23
2017-06-19clk: mediatek: export cpu multiplexer clock for MT2701/MT7623 SoCsSean Wang1-0/+8
2017-06-19clk: mediatek: add missing cpu mux causing Mediatek cpufreq can't workSean Wang3-1/+151
2017-06-19clk: renesas: cpg-mssr: Use of_device_get_match_data() helperGeert Uytterhoeven1-1/+1
2017-06-19clk: hi6220: add acpu clockZhangfei Gao1-0/+22
2017-06-19clk: zx296718: export I2S mux clocksShawn Guo1-4/+4
2017-06-19clk: imx7d: create clocks behind rawnand clock gateStefan Agner1-2/+4
2017-06-19clk: hi3660: Set PPLL2 to 2880MZhong Kaihua1-2/+2
2017-06-19clk: hi3660: add clocks for video encoder, decoder and ISPChen Jun1-0/+40
2017-06-19clk: hi3660: fix wrong parent name of clk_mux_sysbusChen Jun1-2/+4
2017-06-19clk: gcc-msm8916: add support to 9.6MHz codec clkSrinivas Kandagatla1-0/+1
2017-06-19clk: qcom: Add ipq8074 Global Clock Controller supportAbhishek Sahu3-0/+1017
2017-06-19clk: mvebu: cp110: Minor cleanupsStephen Boyd1-3/+2
2017-06-19Merge branch 'clk-cp110' of git://git.infradead.org/linux-mvebu into clk-nextStephen Boyd1-62/+138
2017-06-19clk: socfpga: Fix the smplsel on Arria10 and Stratix10Dinh Nguyen2-1/+4
2017-06-19clk: Hi3660: register fixed_rate_clks with CLK_OF_DECLARE_DRIVERLeo Yan1-10/+38
2017-06-19clk: mvebu: cp110: add sdio clock to cp-110 system controllerKonstantin Porotchkin1-5/+23
2017-06-19clk: mvebu: cp110: introduce a new bindingGregory CLEMENT1-15/+48
2017-06-19clk: mvebu: cp110: do not depend anymore of the *-clock-output-namesGregory CLEMENT1-40/+65