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2022-09-26clk: mediatek: Export required symbols to compile clk drivers as moduleAngeloGioacchino Del Regno4-0/+6
2022-09-26clk: mediatek: clk-apmixed: Remove unneeded __init annotationAngeloGioacchino Del Regno1-1/+1
2022-09-24platform/x86: int3472: Support multiple clock consumersDaniel Scally1-4/+9
2022-09-23clk: rockchip: Add clock controller support for RV1126 SoCJagan Teki4-0/+1165
2022-09-19clk: imx93: add SAI IPG clkPeng Fan1-3/+9
2022-09-19clk: imx93: add MU1/2 clockPeng Fan1-2/+6
2022-09-19clk: imx93: switch to use new clk gate APIPeng Fan1-4/+4
2022-09-19clk: imx: add i.MX93 clk gatePeng Fan3-0/+204
2022-09-19clk: imx: clk-composite-93: check white_listPeng Fan3-5/+10
2022-09-19clk: imx: clk-composite-93: check slice busyPeng Fan1-3/+160
2022-09-18clk: renesas: r8a779g0: Add EtherAVB clocksGeert Uytterhoeven1-0/+3
2022-09-18clk: renesas: r8a779g0: Add PFC/GPIO clocksGeert Uytterhoeven1-0/+4
2022-09-18clk: renesas: r8a779g0: Add I2C clocksGeert Uytterhoeven1-0/+6
2022-09-18clk: renesas: r8a779g0: Add watchdog clockGeert Uytterhoeven1-0/+1
2022-09-16Merge tag 'v6.0-rc5' into i2c/for-mergewindowWolfram Sang3-7/+13
2022-09-15clk: tests: Add missing test case for rangesMaxime Ripard1-0/+53
2022-09-15clk: qcom: clk-rcg2: Take clock boundaries into consideration for gfx3dMaxime Ripard1-0/+9
2022-09-15clk: Introduce the clk_hw_get_rate_range functionMaxime Ripard1-0/+16
2022-09-15clk: Zero the clk_rate_request structureMaxime Ripard1-0/+2
2022-09-15clk: Stop forwarding clk_rate_requests to the parentMaxime Ripard6-16/+274
2022-09-15clk: Constify clk_has_parent()Maxime Ripard1-1/+1
2022-09-15clk: Introduce clk_core_has_parent()Maxime Ripard2-15/+65
2022-09-15clk: Switch from __clk_determine_rate to clk_core_round_rate_nolockMaxime Ripard1-3/+10
2022-09-15clk: Add our request boundaries in clk_core_init_rate_reqMaxime Ripard1-6/+1
2022-09-15clk: Introduce clk_hw_init_rate_request()Maxime Ripard2-10/+30
2022-09-15clk: Move clk_core_init_rate_req() from clk_core_round_rate_nolock() to its callerMaxime Ripard1-5/+3
2022-09-15clk: Change clk_core_init_rate_req prototypeMaxime Ripard1-4/+6
2022-09-15clk: Set req_rate on reparentingMaxime Ripard2-0/+261
2022-09-15clk: Take into account uncached clocks in clk_set_rate_range()Maxime Ripard2-1/+36
2022-09-15clk: tests: Add some tests for orphan with multiple parentsMaxime Ripard1-0/+237
2022-09-15clk: tests: Add tests for mux with multiple parentsMaxime Ripard1-0/+121
2022-09-15clk: tests: Add tests for single parent muxMaxime Ripard1-9/+185
2022-09-15clk: tests: Add tests for uncached clockMaxime Ripard1-1/+92
2022-09-15clk: tests: Add reference to the orphan mux bug reportMaxime Ripard1-0/+3
2022-09-15clk: tests: Add test suites descriptionMaxime Ripard1-0/+33
2022-09-15clk: Clarify clk_get_rate() expectationsMaxime Ripard1-2/+3
2022-09-15clk: Skip clamping when rounding if there's no boundariesMaxime Ripard1-1/+13
2022-09-15clk: Drop the rate range on clk_put()Maxime Ripard2-14/+141
2022-09-15clk: test: Switch to clk_hw_get_clkMaxime Ripard1-19/+55
2022-09-15clk: at91: sama5d2: Add Generic Clocks for UART/USARTSergiu Moga1-0/+10
2022-09-14clk: microchip: add PolarFire SoC fabric clock supportConor Dooley2-0/+291
2022-09-14clk: microchip: mpfs: update module authorship & licencingConor Dooley1-3/+7
2022-09-14clk: microchip: mpfs: convert periph_clk to clk_gateConor Dooley1-66/+6
2022-09-14clk: microchip: mpfs: convert cfg_clk to clk_dividerConor Dooley1-68/+8
2022-09-14clk: microchip: mpfs: delete 2 line mpfs_clk_register_foo()Conor Dooley1-27/+6
2022-09-14clk: microchip: mpfs: simplify control reg accessConor Dooley1-25/+17
2022-09-14clk: microchip: mpfs: move id & offset out of clock structsConor Dooley1-15/+15
2022-09-14clk: microchip: mpfs: add MSS pll's set & round rateConor Dooley1-0/+54
2022-09-14clk: microchip: mpfs: add reset controllerConor Dooley2-12/+99
2022-09-14clk: microchip: mpfs: make the rtc's ahb clock criticalConor Dooley1-1/+3