| Age | Commit message (Expand) | Author | Files | Lines |
| 2020-11-01 | clk: imx: remove unneeded semicolon |  Tom Rix | 1 | -1/+1 |
| 2020-10-28 | clk: define to_clk_regmap() as inline function |  Arnd Bergmann | 2 | -2/+9 |
| 2020-10-28 | clk: samsung: exynos-clkout: convert to module driver |  Krzysztof Kozlowski | 1 | -56/+140 |
| 2020-10-26 | clk: rockchip: Add appropriate arch dependencies |  Robin Murphy | 1 | -1/+11 |
| 2020-10-26 | clk: renesas: rcar-gen3: Remove stp_ck handling for SDHI |  Wolfram Sang | 1 | -26/+25 |
| 2020-10-26 | clk: imx: lpcg: add suspend/resume support |  Dong Aisheng | 3 | -0/+39 |
| 2020-10-26 | clk: imx: clk-imx8qxp-lpcg: add runtime pm support |  Dong Aisheng | 1 | -5/+19 |
| 2020-10-26 | clk: imx: lpcg: allow lpcg clk to take device pointer |  Dong Aisheng | 2 | -8/+24 |
| 2020-10-26 | clk: imx: imx8qxp-lpcg: add parsing clocks from device tree |  Dong Aisheng | 3 | -0/+133 |
| 2020-10-26 | clk: imx: scu: add suspend/resume support |  Dong Aisheng | 1 | -0/+49 |
| 2020-10-26 | clk: imx: scu: add runtime pm support |  Dong Aisheng | 1 | -2/+20 |
| 2020-10-26 | clk: imx: scu: allow scu clk to take device pointer |  Dong Aisheng | 2 | -8/+10 |
| 2020-10-26 | clk: imx: scu: bypass cpu power domains |  Dong Aisheng | 1 | -0/+4 |
| 2020-10-26 | clk: imx: scu: add two cells binding support |  Dong Aisheng | 3 | -67/+252 |
| 2020-10-25 | treewide: Convert macro and uses of __section(foo) to __section("foo") |  Joe Perches | 1 | -1/+1 |
| 2020-10-24 | Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc |  Linus Torvalds | 8 | -218/+13 |
| 2020-10-22 | Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux |  Linus Torvalds | 129 | -805/+6816 |
| 2020-10-20 | Merge branches 'clk-ingenic', 'clk-at91', 'clk-kconfig', 'clk-imx', 'clk-qcom', 'clk-prima2' and 'clk-bcm' into clk-next |  Stephen Boyd | 54 | -437/+2555 |
| 2020-10-20 | Merge branches 'clk-semicolon', 'clk-axi-clkgen', 'clk-qoriq', 'clk-baikal', 'clk-const' and 'clk-mmp2' into clk-next |  Stephen Boyd | 9 | -68/+155 |
| 2020-10-20 | Merge branches 'clk-simplify', 'clk-ti', 'clk-tegra', 'clk-rockchip' and 'clk-mediatek' into clk-next |  Stephen Boyd | 26 | -103/+1775 |
| 2020-10-20 | Merge branches 'clk-renesas', 'clk-amlogic', 'clk-allwinner', 'clk-samsung', 'clk-doc' and 'clk-unused' into clk-next |  Stephen Boyd | 27 | -134/+1942 |
| 2020-10-20 | clk: imx8mq: Fix usdhc parents order |  Abel Vesa | 1 | -2/+2 |
| 2020-10-20 | clk: qcom: gdsc: Keep RETAIN_FF bit set if gdsc is already on |  Stephen Boyd | 1 | -0/+8 |
| 2020-10-14 | clk: Restrict CLK_HSDK to ARC_SOC_HSDK |  Geert Uytterhoeven | 1 | -1/+1 |
| 2020-10-14 | clk: at91: sam9x60: support only two programmable clocks |  Claudiu Beznea | 1 | -1/+1 |
| 2020-10-13 | clk: ingenic: Respect CLK_SET_RATE_PARENT in .round_rate |  Paul Cercueil | 1 | -0/+2 |
| 2020-10-13 | clk: ingenic: Don't tag custom clocks with CLK_SET_RATE_PARENT |  Paul Cercueil | 1 | -7/+7 |
| 2020-10-13 | clk: ingenic: Don't use CLK_SET_RATE_GATE for PLL |  Paul Cercueil | 1 | -2/+7 |
| 2020-10-13 | clk: ingenic: Use readl_poll_timeout instead of custom loop |  Paul Cercueil | 1 | -26/+29 |
| 2020-10-13 | clk: ingenic: Use to_clk_info() macro for all clocks |  Paul Cercueil | 1 | -39/+15 |
| 2020-10-13 | clk: bcm2835: add missing release if devm_clk_hw_register fails |  Navid Emamdoost | 1 | -1/+3 |
| 2020-10-13 | clk: at91: clk-sam9x60-pll: remove unused variable |  Claudiu Beznea | 1 | -2/+1 |
| 2020-10-13 | clk: at91: clk-main: update key before writing AT91_CKGR_MOR |  Claudiu Beznea | 1 | -3/+8 |
| 2020-10-13 | clk: at91: remove the checking of parent_name |  Claudiu Beznea | 1 | -2/+2 |
| 2020-10-13 | clk: clk-prima2: fix return value check in prima2_clk_init() |  Xu Wang | 1 | -1/+1 |
| 2020-10-13 | clk: mmp2: Fix the display clock divider base |  Lubomir Rintel | 1 | -2/+2 |
| 2020-10-13 | clk: pxa: Constify static struct clk_ops |  Rikard Falkeborn | 1 | -4/+4 |
| 2020-10-13 | clk: baikal-t1: Mark Ethernet PLL as critical |  Serge Semin | 1 | -6/+8 |
| 2020-10-13 | clk: qoriq: modify MAX_PLL_DIV to 32 |  Zhao Qiang | 1 | -1/+1 |
| 2020-10-13 | clk: axi-clkgen: Set power bits for fractional mode |  Lars-Peter Clausen | 1 | -0/+7 |
| 2020-10-13 | clk: axi-clkgen: Add support for fractional dividers |  Lars-Peter Clausen | 1 | -51/+129 |
| 2020-10-13 | clk: qcom: Add display clock controller driver for SM8150 and SM8250 |  Jonathan Marek | 3 | -0/+1117 |
| 2020-10-13 | clk: qcom: add video clock controller driver for SM8250 |  Jonathan Marek | 3 | -0/+379 |
| 2020-10-13 | clk: qcom: add video clock controller driver for SM8150 |  Jonathan Marek | 3 | -0/+286 |
| 2020-10-13 | clk: qcom: gcc-msm8994: Add missing clocks, resets and GDSCs |  Konrad Dybcio | 1 | -1/+387 |
| 2020-10-13 | clk: meson: use semicolons rather than commas to separate statements |  Julia Lawall | 1 | -1/+1 |
| 2020-10-13 | clk: mvebu: ap80x-cpu: use semicolons rather than commas to separate statements |  Julia Lawall | 1 | -1/+1 |
| 2020-10-13 | clk: uniphier: use semicolons rather than commas to separate statements |  Julia Lawall | 2 | -2/+2 |
| 2020-10-13 | clk/qcom: fix spelling typo |  Wang Qing | 1 | -5/+5 |
| 2020-10-13 | clk: mediatek: Add MT8167 clock support |  Fabien Parent | 8 | -0/+1505 |