linux-dev - Linux kernel development work

Age	Commit message (Expand)	Author	Files	Lines
2022-05-18	clk: mediatek: use en_mask as a pure div_en_mask	Chun-Jie Chen	14	-131/+127
2022-05-18	clk: ingenic-tcu: Fix missing TCU clock for X1000 SoCs	Aidan MacDonald	1	-10/+25
2022-05-18	clk: mediatek: update compatible string for MT7986 ethsys	Sam Shih	1	-1/+1
2022-05-18	clk: ingenic: Mark critical clocks in Ingenic SoCs	Aidan MacDonald	7	-0/+76
2022-05-18	clk: ingenic: Allow specifying common clock flags	Aidan MacDonald	2	-1/+4
2022-05-18	clk: ux500: fix a possible off-by-one in u8500_prcc_reset_base()	Hangyu Hua	1	-1/+1
2022-05-17	clk: at91: generated: consider range when calculating best rate	Codrin Ciubotariu	1	-0/+4
2022-05-17	clk: imx8mp: fix usb_root_clk parent	Peng Fan	1	-1/+1
2022-05-17	Revert "clk: sunxi-ng: sun6i-rtc: Add support for H6"	Jernej Skrabec	1	-15/+0
2022-05-17	clk: bcm2835: fix bcm2835_clock_choose_div	Stefan Wahren	1	-0/+1
2022-05-16	clk: fixed-rate: Remove redundant if statement	Li Zhengyu	1	-1/+1
2022-05-10	clk: samsung: exynosautov9: add cmu_peric1 clock support	Chanho Park	1	-0/+254
2022-05-10	clk: samsung: exynosautov9: add cmu_peric0 clock support	Chanho Park	1	-0/+254
2022-05-10	clk: samsung: exynosautov9: add cmu_fsys2 clock support	Chanho Park	1	-0/+69
2022-05-10	clk: samsung: exynosautov9: add cmu_busmc clock support	Chanho Park	1	-0/+55
2022-05-10	clk: samsung: exynosautov9: add cmu_peris clock support	Chanho Park	1	-0/+51
2022-05-10	clk: samsung: exynosautov9: add cmu_core clock support	Chanho Park	1	-0/+92
2022-05-10	clk: samsung: add top clock support for Exynos Auto v9 SoC	Chanho Park	2	-0/+959
2022-05-07	ARM: pxa: move clk register definitions to driver	Arnd Bergmann	6	-49/+196
2022-05-07	ARM: pxa: move smemc register access from clk to platform	Arnd Bergmann	5	-63/+15
2022-05-07	cpufreq: pxa3: move clk register access to clk driver	Arnd Bergmann	1	-0/+16
2022-05-06	clk: sunxi-ng: h616: Add PLL derived 32KHz clock	Andre Przywara	2	-1/+9
2022-05-06	clk: sunxi-ng: h6-r: Add RTC gate clock	Andre Przywara	2	-1/+6
2022-05-06	clk: tegra: Update kerneldoc to match prototypes	Thierry Reding	1	-4/+4
2022-05-06	clk: renesas: r9a09g011: Add eth clock and reset entries	Phil Edworthy	1	-5/+9
2022-05-06	clk: renesas: Add RZ/V2M support using the rzg2l driver	Phil Edworthy	5	-0/+181
2022-05-05	clk: qcom: gcc-msm8976: Add modem reset	Adam Skladowski	1	-0/+1
2022-05-05	clk: qcom: gcc-msm8976: Set floor ops for SDCC	Adam Skladowski	1	-3/+3
2022-05-05	clk: renesas: rzg2l: Add support for RZ/V2M reset monitor reg	Phil Edworthy	2	-3/+17
2022-05-05	clk: renesas: rzg2l: Make use of CLK_MON registers optional	Phil Edworthy	4	-1/+16
2022-05-05	clk: renesas: rzg2l: Set HIWORD mask for all mux and dividers	Phil Edworthy	3	-31/+19
2022-05-05	clk: renesas: rzg2l: Add read only versions of the clk macros	Phil Edworthy	3	-6/+12
2022-05-05	clk: renesas: rzg2l: Move the DEF_MUX array size calc into the macro	Phil Edworthy	3	-22/+19
2022-05-05	clk: renesas: r9a07g044: Fix OSTM1 module clock name	Geert Uytterhoeven	1	-1/+1
2022-05-05	clk: renesas: r9a07g043: Add clock and reset entries for ADC	Biju Das	1	-0/+6
2022-05-05	clk: renesas: r9a07g043: Add TSU clock and reset entry	Biju Das	1	-0/+6
2022-05-05	clk: renesas: r9a07g043: Add RSPI clock and reset entries	Biju Das	1	-0/+9
2022-05-05	clk: renesas: r9a07g043: Add clock and reset entries for SPI Multi I/O Bus Controller	Biju Das	1	-0/+18
2022-05-05	clk: renesas: r9a07g044: Add DSI clock and reset entries	Biju Das	1	-1/+16
2022-05-05	clk: renesas: r9a07g044: Add LCDC clock and reset entries	Biju Das	1	-1/+8
2022-05-05	clk: renesas: r9a07g044: Add M4 Clock support	Biju Das	1	-1/+18
2022-05-05	clk: renesas: r9a07g044: Add M3 Clock support	Biju Das	1	-1/+4
2022-05-05	clk: renesas: r9a07g044: Add {M2, M2_DIV2} Clocks support	Biju Das	1	-1/+4
2022-05-05	clk: renesas: r9a07g044: Add M1 clock support	Biju Das	1	-1/+10
2022-05-05	clk: renesas: rzg2l: Add DSI divider clk support	Biju Das	2	-0/+136
2022-05-05	clk: renesas: rzg2l: Add PLL5_4 clk mux support	Biju Das	2	-0/+103
2022-05-05	clk: renesas: rzg2l: Add FOUTPOSTDIV clk support	Biju Das	2	-0/+235
2022-05-04	clk: tegra: Replace .round_rate() with .determine_rate()	Rajkumar Kasirajan	1	-5/+10
2022-05-04	clk: tegra: Register clocks from root to leaf	Timo Alho	1	-16/+56
2022-05-04	clk: tegra: Add missing reset deassertion	Diogo Ivo	1	-0/+12