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2013-02-13clk: tegra: fix driver to match DT bindingStephen Warren2-5/+5
enum tegra*_clk is intended to match the IDs listed in the Tegra clock bindings. There are a few mismatches, which this patch fixes: 1) pll_s and cop were left out of the Tegra20 enum. 2) spdif_in and spdif_out were swapped relative to the Tegra30 binding. 3) i2cslow was misnamed as i2c_slow, and a duplicate i2cslow clock added to the Tegra30 enum. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Thierry Reding <thierry.reding@avionic-design.de> Tested-by: Thierry Reding <thierry.reding@avionic-design.de>
2013-02-12clk: tegra: local arrays should be staticPeter De Schrijver1-10/+10
cclk_g_parents, cclk_lp_parents and sclk_parents are only accessed from within clk-tegra30.c. Declare them static to avoid namespace polution. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Acked-by: Mike Turquette <mturquette@linaro.org> Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-02-12clk: tegra: Add missing spinlock for hclk and pclkPeter De Schrijver2-8/+14
The hclk and pclk clocks are controlled by the same register. Hence a lock is required to avoid corruption. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Acked-by: Mike Turquette <mturquette@linaro.org> Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-02-12clk: tegra: Implement locking for super clockPeter De Schrijver1-3/+15
Although tegra_clk_register_super_mux() has a lock parameter, the lock is not actually used by the code. Fixed with this patch. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Acked-by: Mike Turquette <mturquette@linaro.org> Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-02-12clk: tegra: fix wrong clock index between se to sata_coldJoseph Lo1-3/+3
The index of se should be 127. And the previous clock index was 125. So we need to set up the index for se to get the correct index between se to sata_cold. Signed-off-by: Joseph Lo <josephl@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-02-11Merge branch 'acpi-lpss'Rafael J. Wysocki5-0/+224
* acpi-lpss: ACPI / platform: create LPSS clocks if Lynxpoint devices are found during scan clk: x86: add support for Lynxpoint LPSS clocks x86: add support for Intel Low Power Subsystem ACPI / platform: fix comment about the platform device name ACPI: add support for CSRT table
2013-02-09Merge tag 'mxs-soc-3.9' of git://git.linaro.org/people/shawnguo/linux-2.6 into next/socOlof Johansson1-1/+1
From Shawn Guo: mxs soc changes for 3.9 - A couple of optimization on timer - Some updates on mxs_defconfig * tag 'mxs-soc-3.9' of git://git.linaro.org/people/shawnguo/linux-2.6: ARM: mxs_defconfig: Select CONFIG_DEVTMPFS_MOUNT ARM: mxs: decrease mxs_clockevent_device.min_delta_ns to 2 clock cycles ARM: mxs: use apbx bus clock to drive the timers on timrotv2 ARM: mxs: Update mxs_defconfig
2013-02-09cpufreq: kirkwood: Add a cpufreq driver for Marvell Kirkwood SoCsAndrew Lunn1-0/+1
The Marvell Kirkwood SoCs have simple cpufreq support in hardware. The CPU can either use the a high speed cpu clock, or the slower DDR clock. Add a driver to swap between these two clock sources. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Acked-by: Jason Cooper <jason@lakedaemon.net> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2013-02-05Merge tag 'tegra-for-3.9-soc-cpuidle' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into next/socOlof Johansson1-0/+93
From Stephen Warren: ARM: tegra: cpuidle enhancements This pull request implements a new "LP2" cpuidle state for Tegra20, which makes use of the couple cpuidle feature. It is based on (most of) the previous pull request, with tag tegra-for-3.9-soc-usb. * tag 'tegra-for-3.9-soc-cpuidle' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra: ARM: tegra20: cpuidle: apply coupled cpuidle for powered-down mode ARM: tegra20: flowctrl: add support for cpu_suspend_enter/exit clk: tegra20: Implementing CPU low-power function for tegra_cpu_car_ops ARM: tegra20: cpuidle: add powered-down state for secondary CPU ARM: tegra: add pending SGI checking API Signed-off-by: Olof Johansson <olof@lixom.net>
2013-02-05Merge tag 'tegra-for-3.9-soc-ccf' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into next/socOlof Johansson13-0/+5438
From Stephen Warren: ARM: tegra: Common Clock Framework rework Tegra already supports the common clock framework, but had issues: 1) The clock driver was located in arch/arm/mach-tegra/ rather than drivers/clk/. 2) A single "Tegra clock" type was implemented, rather than separate clock types for PLL, mux, divider, ... type in HW. 3) Clock lookups by device drivers were still driven by device name and connection ID, rather than through device tree. This pull request solves all three issues. This required some DT changes to add clocks properties, and driver changes to request clocks more "correctly". Finally, this rework allows all AUXDATA to be removed from Tegra board files, and various duplicate clock lookup entries to be removed from the driver. This pull request is based on the previous pull request, with tag tegra-for-3.9-cleanup. * tag 'tegra-for-3.9-soc-ccf' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra: (31 commits) clk: tegra30: remove unused TEGRA_CLK_DUPLICATE()s clk: tegra20: remove unused TEGRA_CLK_DUPLICATE()s ARM: tegra30: remove auxdata ARM: tegra20: remove auxdata ASoC: tegra: remove auxdata staging: nvec: remove use of clk_get_sys ARM: tegra: paz00: add clock information to DT ARM: tegra: add clock properties to Tegra30 DT ARM: tegra: add clock properties to Tegra20 DT spi: tegra: do not use clock name to get clock ARM: tegra: remove legacy clock code ARM: tegra: migrate to new clock code clk: tegra: add clock support for Tegra30 clk: tegra: add clock support for Tegra20 clk: tegra: add Tegra specific clocks ARM: tegra: define Tegra30 CAR binding ARM: tegra: define Tegra20 CAR binding ARM: tegra: move tegra_cpu_car.h to linux/clk/tegra.h ARM: tegra: add function to read chipid ARM: tegra: fix compile error when disable CPU_IDLE ... Signed-off-by: Olof Johansson <olof@lixom.net> Conflicts: arch/arm/mach-tegra/board-dt-tegra20.c arch/arm/mach-tegra/board-dt-tegra30.c arch/arm/mach-tegra/common.c arch/arm/mach-tegra/platsmp.c drivers/clocksource/Makefile
2013-02-04Merge tag 'v3.8-rc6' into next/socOlof Johansson1-3/+6
Linux 3.8-rc6
2013-02-05ARM: mxs: use apbx bus clock to drive the timers on timrotv2Torben Hohn1-1/+1
timer resolution of ~32us is pretty low. v2 has 32bits resolution, so we have quite some headroom, and can use the 24MHz clock. v1 has only 16bits, so we only increase v2. So we just exchange the timrot clock in imx28. On imx23 we have timrotv1 and everything stays the same. Signed-off-by: Torben Hohn <torbenh@linutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-02-02clk / highbank: Prevent glitches in non-bypass reset modeMark Langsdorf1-0/+2
The highbank clock will glitch with the current code if the clock rate is reset without relocking the PLL. Program the PLL correctly to prevent glitches. Signed-off-by: Mark Langsdorf <mark.langsdorf@calxeda.com> Signed-off-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2013-01-30arm: Move sp810.h to include/linux/amba/Catalin Marinas1-2/+1
Since it is now used by code under drivers/clk/ it makes sense for this file to be in a more generic location. This is required for building vexpress support on arm64. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Acked-by: Pawel Moll <pawel.moll@arm.com> Cc: Shiraz Hashim <shiraz.hashim@st.com> Cc: Russell King <linux@arm.linux.org.uk> Signed-off-by: Pawel Moll <pawel.moll@arm.com>
2013-01-28clk: tegra20: Implementing CPU low-power function for tegra_cpu_car_opsJoseph Lo1-0/+93
Implementing suspend, resume and rail_off_ready API for tegra_cpu_car_ops. These functions were used for CPU powered-down state maintenance. Signed-off-by: Joseph Lo <josephl@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28clk: tegra30: remove unused TEGRA_CLK_DUPLICATE()sPrashant Gaikwad1-70/+0
With device tree support added for Tegra clocks look up is done from device tree, remove unused TEGRA_CLK_DUPLICATE()s. Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28clk: tegra20: remove unused TEGRA_CLK_DUPLICATE()sPrashant Gaikwad1-17/+0
With device tree support added for Tegra clocks look up is done from device tree, remove unused TEGRA_CLK_DUPLICATE()s. Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28ARM: tegra: migrate to new clock codePrashant Gaikwad2-0/+54
Migrate Tegra clock support to drivers/clk/tegra, this involves moving: 1. definition of tegra_cpu_car_ops to clk.c 2. definition of reset functions to clk-peripheral.c 3. change parent of cpu clock. 4. Remove legacy clock initialization. 5. Initialize clocks using DT. 6. Remove all instance of mach/clk.h Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> [swarren: use to_clk_periph_gate().] Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28clk: tegra: add clock support for Tegra30Prashant Gaikwad3-0/+2064
Add Tegra30 clock support based on common clock framework. Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> [swarren: ensure all OF lookups return valid cookies i.e. an explicit error pointer or valid pointer not NULL, adapt to renames in earlier patches, fixed some checkpatch issues.] Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28clk: tegra: add clock support for Tegra20Prashant Gaikwad3-0/+1281
Add Tegra20 clock support based on common clock framework. Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> [swarren: s/1GHz/100MHz/ in call to tegra_clk_plle() to fix PCIe, implemented KBC clock, ensure all OF lookups return valid cookies i.e. an explicit error pointer or valid pointer not NULL, adapt to renames in earlier patches, fixed some checkpatch issues.] Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28clk: tegra: add Tegra specific clocksPrashant Gaikwad11-0/+2126
Add Tegra specific clocks, pll, pll_out, peripheral, frac_divider, super. Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> [swarren: alloc sizeof(*foo) not sizeof(struct foo), add comments re: storing pointers to stack variables, make a timeout loop more idiomatic, use _clk_pll_disable() not clk_disable_pll() from _program_pll() to avoid redundant lock operations, unified tegra_clk_periph() and tegra_clk_periph_nodiv(), unified tegra_clk_pll{,e}, rename all clock registration functions so they don't have the same name as the clock structs, return -EINVAL from clk_plle_enable when matching table rate not found, pass ops to _tegra_clk_register_pll rather than a bool.] Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-24clk: vexpress: Use common of_clk_init() functionPrashant Gaikwad2-7/+2
Use common of_clk_init() function for clock initialization. Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> Tested-by: Pawel Moll <pawel.moll@arm.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-01-24clk: zynq: Use common of_clk_init() functionPrashant Gaikwad1-10/+4
Use common of_clk_init() function for clock initialization. Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> Reviewed-by: Josh Cartwright <josh.cartwright@ni.com> Tested-by: Josh Cartwright <josh.cartwright@ni.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-01-24clk: vt8500: Use common of_clk_init() functionPrashant Gaikwad1-12/+5
Use common of_clk_init() function for clock initialization. Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> Tested-by: Tony Prisk <linux@prisktech.co.nz> Signed-off-by: Mike Turquette <mturquette@linaro.org> [mturquette@linaro.org: added entry for wm8750-pll-clock] Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-01-24clk: highbank: Use common of_clk_init() functionPrashant Gaikwad1-14/+4
Use common of_clk_init() function for clocks initialization. Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> Tested-by: Rob Herring <rob.herring@calxeda.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-01-24clk: sunxi: Use common of_clk_init() functionPrashant Gaikwad1-30/+0
Use common of_clk_init() function to initialize clocks. Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> Acked-by: Maxime Ripard <maxime.ripard@anandra.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-01-24clk: add common of_clk_init() functionPrashant Gaikwad2-0/+10
Modify of_clk_init function so that it will determine which driver to initialize based on device tree instead of each driver registering to it. Based on a similar patch for drivers/irqchip by Thomas Petazzoni and drivers/clocksource by Stephen Warren. Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> Tested-by: Tony Prisk <linux@prisktech.co.nz> Tested-by: Pawel Moll <pawel.moll@arm.com> Tested-by: Rob Herring <rob.herring@calxeda.com> Tested-by: Josh Cartwright <josh.cartwright@ni.com> Reviewed-by: Josh Cartwright <josh.cartwright@ni.com> Acked-by: Maxime Ripard <maxime.ripard@anandra.org> Signed-off-by: Mike Turquette <mturquette@linaro.org> [mturquette@linaro.org: merge conflict from missing CLKSRC_OF_TABLES()] Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-01-23Merge tag 'mvebu_fixes_for_v3.8-rc5' of git://git.infradead.org/users/jcooper/linux into fixesOlof Johansson1-3/+6
From Jason Cooper: mvebu fixes for v3.8-rc5 - fix memory leak in mvebu/clk-cpu.c - use devm_ to correct/simplify error paths in mvsdio - add missing #interrupt-cells property in kirkwood * tag 'mvebu_fixes_for_v3.8-rc5' of git://git.infradead.org/users/jcooper/linux: ARM: kirkwood: fix missing #interrupt-cells property mmc: mvsdio: use devm_ API to simplify/correct error paths. clk: mvebu/clk-cpu.c: fix memory leakage
2013-01-23clk: x86: add support for Lynxpoint LPSS clocksMika Westerberg5-0/+224
Intel Lynxpoint Low Power Subsystem hosts peripherals like UART, I2C and SPI controllers. For most of these there is a configuration register that allows software to enable and disable the functional clock. Disabling the clock while the peripheral is not used saves power. In order to take advantage of this we add a new clock gate of type lpss_gate that just re-uses the ordinary clk_gate but in addition is able to enumerate the base address register of the device using ACPI. We then create a clock tree that models the Lynxpoint LPSS clocks using these gates and fixed clocks so that we can pass clock rate to the drivers as well. Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com> Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2013-01-23clk: mvebu/clk-cpu.c: fix memory leakageCong Ding1-3/+6
the variable cpuclk and clk_name should be properly freed when error happens. Signed-off-by: Cong Ding <dinggnu@gmail.com> Acked-by: Jason Cooper <jason@lakedaemon.net> Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-01-21clk: Deduplicate exit code in clk_set_rateNestor Ovroy1-3/+0
On non-out case 'return ret;' is equivalent to 'return 0;' as the ret variable is initialized at 0 and never changed. Signed-off-by: Nestor Ovroy <novroy@riseup.net>
2013-01-18clk: beautify MakefileMike Turquette1-2/+7
The list of common clock types was getting a bit unmanageable. This patch puts only one file on each line and reorders the object files alphabetically. Also a newline is added to separate the sections. Reported-by: Stephen Boyd <sboyd@codeaurora.org> Cc: Prashant Gaikwad <pgaikwad@nvidia.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-01-18clk-divider: fix macrosJames Hogan1-3/+3
The macro is_power_of_two() in clk-divider.c was defined as !(i & ~i) which is always true. Instead use is_power_of_2() from log2.h. Also add brackets around the macro arguments in div_mask to avoid any future operator precedence problems. Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: Joe Perches <joe@perches.com> Signed-off-by: Mike Turquette <mturquette@linaro.org> [mturquette@linaro.org: use log2.h per Joe Perches; update changelog]
2013-01-18clk: prima2: enable dt-binding clkdev mappingBarry Song1-124/+79
this patche deletes hard code that registers clkdev by things like: clk_register_clkdev(clk, NULL, "b0030000.nand"); clk_register_clkdev(clk, NULL, "b0040000.audio"); clk_register_clkdev(clk, NULL, "b0080000.usp"); prima2 clock controller becomes a clock provider and every dt node just declares its clock sources by dt prop. it also makes us easier to extend this driver to support both prima2 and marco as marco has different address mapping with prima2. Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-01-15clk: mxs: Index is always positiveFabio Estevam2-2/+2
Fix the following warnings when building with W=1 option: drivers/clk/mxs/clk-imx23.c: In function 'mx23_clocks_init': drivers/clk/mxs/clk-imx23.c:149:16: warning: comparison between signed and unsigned integer expressions [-Wsign-compare] drivers/clk/mxs/clk-imx23.c:165:16: warning: comparison between signed and unsigned integer expressions [-Wsign-compare] ... drivers/clk/mxs/clk-imx28.c: In function 'mx28_clocks_init': drivers/clk/mxs/clk-imx28.c:227:16: warning: comparison between signed and unsigned integer expressions [-Wsign-compare] drivers/clk/mxs/clk-imx28.c:244:16: warning: comparison between signed and unsigned integer expressions [-Wsign-compare] Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-01-15clk: max77686: Avoid double free at remove timeLaurent Pinchart1-2/+1
The clk_lookup entry is dropped at remove time by a call to clkdev_drop(). That function frees the entry, which is also freed by the driver core as it has been allocated through devm_kzalloc(). This results in a double free. Use kzalloc() instead of devm_kzalloc() to fix this. Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-01-15clk: remove exported function from __init sectionDenis Efremov1-1/+1
The symbol of_fixed_clk_setup is exported and annotated __init. This looks like section mismatch. Fix this by removing the __init annotation of of_fixed_clk_setup. Signed-off-by: Denis Efremov <yefremov.denis@gmail.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-01-15clk: vt8500: Add support for WM8750/WM8850 PLL clocksTony Prisk1-2/+100
This patch adds support for the new PLL module found in WM8750 and WM8850 SoCs. Signed-off-by: Tony Prisk <linux@prisktech.co.nz> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-01-15clk: vt8500: Fix division-by-0 when requested rate=0Tony Prisk1-2/+12
A request to vt8500_dclk_(round_rate/set_rate) with rate=0 results in a division-by-0 in the kernel. Signed-off-by: Tony Prisk <linux@prisktech.co.nz> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-01-15clk: vt8500: Fix device clock divisor calculationsTony Prisk1-0/+8
When calculating device clock divisor values in set_rate and round_rate, we do a simple integer divide. If parent_rate / rate has a fraction, this is dropped which results in the device clock being set too high. This patch corrects the problem by adding 1 to the calculated divisor if the division would have had a decimal result. Signed-off-by: Tony Prisk <linux@prisktech.co.nz> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-01-15clk: vt8500: Fix error in PLL calculations on non-exact match.Tony Prisk1-3/+3
When a PLL frequency calculation is performed and a non-exact match is found the wrong multiplier and divisors are returned. Signed-off-by: Tony Prisk <linux@prisktech.co.nz> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-01-15clk: max77686: Remove unnecessary NULL checking for container_of()Axel Lin1-21/+7
container_of() never returns NULL, thus remove the NULL checking for it. Also rename get_max77686_clk() to to_max77686_clk() for better readability. Signed-off-by: Axel Lin <axel.lin@gmail.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-01-14clk: bcm2835: probe for fixed-clock in device treeStephen Warren1-0/+9
This will allow fixed-clocks to be registered in device tree, which in turn will allow clock clients to look up their clocks in device tree. The first driver to use this feature will be the bcm2835 SDHCI/MMC driver. In the long run, it is likely these fixed clocks will be replaced with an actual clock implementation which speaks to the VideoCore processor, but this change should be transparent to clock consumers. Cc: Mike Turquette <mturquette@linaro.org> Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
2013-01-11clk: JSON debugfs clock tree summaryPrashant Gaikwad1-0/+75
Clock information is dumped in JSON format which is easy for machines to parse. Each clock is represented as an object which has same name as clock and following properties - enable_count - prepare_count - rate Output is verified using online JSON editor. Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-01-11clk: human-readable debugfs clock tree summaryPrashant Gaikwad1-0/+67
Adds debug file "clk_summary" in /sys/kernel/debug/clk dir. It helps to view all the clock registered in human-readable format. For example: clock enable_cnt prepare_cnt rate --------------------------------------------------------------------- i2s0_sync 0 0 24000000 spdif_in_sync 0 0 24000000 spdif_mux 0 0 24000000 spdif 0 0 24000000 spdif_doubler 0 0 48000000 spdif_div 0 0 48000000 spdif_2x 0 0 48000000 clk_32k 2 2 32768 blink_override 1 1 32768 blink 1 1 32768 clk_m 2 2 12000000 clk_out_3_mux 0 0 12000000 clk_out_3 0 0 12000000 pll_ref 3 3 12000000 pll_e_mux 0 0 12000000 pll_e 0 0 100000000 cml0 0 0 100000000 cml1 0 0 100000000 pciex 0 0 100000000 pll_d2 0 0 1000000 pll_d2_out0 0 0 500000 pll_d 0 0 1000000 pll_d_out0 0 0 500000 dsib_mux 0 0 500000 dsib 0 0 500000 dsia 0 0 500000 Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-01-11clk: max77686: Fix return value checking for devm_kzallocAxel Lin1-3/+3
devm_kzalloc returns NULL on failure. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-01-11clk: fixed-factor: round_rate should use do_divHaojian Zhuang1-1/+4
clk->rate = parent->rate / div * mult The formula is OK. But it may overflow while we do operate with unsigned long. So use do_div instead. Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com> Signed-off-by: Mike Turquette <mturquette@linaro.org> [mturquette@linaro.org: improved $SUBJECT]
2013-01-11clk: export __clk_get_name for re-use in imx-ipu-v3 and othersNiels de Vos1-0/+1
This fixes the following error when building for arm-imx: > ERROR: "__clk_get_name" [drivers/staging/imx-drm/ipu-v3/imx-ipu-v3.ko] undefined! > make[1]: *** [__modpost] Error 1 > make: *** [modules] Error 2 There are valid usecases to get the name of a clock, be it for debugging purposes or to register a children of a clock like done in this IPU driver. Therefore exporting __clk_get_name() and make it available for others makes sense. Reported-by: Peter Robinson <pbrobinson@gmail.com> CC: Sascha Hauer <s.hauer@pengutronix.de> CC: Mike Turquette <mturquette@linaro.org> Signed-off-by: Niels de Vos <ndevos@redhat.com> Signed-off-by: Mike Turquette <mturquette@linaro.org> [mturquette@linaro.org: removal of inline made redundant by 65800b2]
2013-01-11clk: Don't mark shared helper functions as inlineRuss Dill1-7/+7
The helper functions that access the opaque struct clk should not be marked inline since they are contained in clk.c, but expected to be used by other compilation units. This causes compile errors under gcc-4.7 In file included from arch/arm/mach-omap2/clockdomain.c:25:0: arch/arm/mach-omap2/clockdomain.c: In function ‘clkdm_clk_disable’: include/linux/clk-provider.h:338:12: error: inlining failed in call to always_inline ‘__clk_get_enable_count’: function body not available arch/arm/mach-omap2/clockdomain.c:1001:28: error: called from here make[1]: *** [arch/arm/mach-omap2/clockdomain.o] Error 1 make: *** [arch/arm/mach-omap2] Error 2 Signed-off-by: Russ Dill <Russ.Dill@ti.com> Signed-off-by: Mike Turquette <mturquette@linaro.org> [mturquette@linaro.org: removed fixes made redundant by commit 93532c8a] [mturquette@linaro.org: improved $SUBJECT]
2013-01-08Merge tag 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-socLinus Torvalds1-1/+1
Pull ARM SoC fixes from Olof Johansson: "People are back from the holiday breaks, and it shows. Here are a bunch of fixes for a number of platforms: - A couple of small fixes for Nomadik - A larger set of changes for kirkwood/mvebu - uart driver selection, dt clocks, gpio-poweroff fixups, a few __init annotation fixes and some error handling improvement in their xor dma driver. - i.MX had a couple of minor fixes (and a critical one for flexcan2 clock setup) - MXS has a small board fix and a framebuffer bugfix - A set of fixes for Samsung Exynos, fixing default bootargs and some Exynos5440 clock issues - A set of OMAP changes including PM fixes and a few sparse warning fixups All in all a bit more positive code delta than we'd ideally want to see here, mostly from the OMAP PM changes, but nothing overly crazy." * tag 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (44 commits) ARM: clps711x: Fix bad merge of clockevents setup ARM: highbank: save and restore L2 cache and GIC on suspend ARM: highbank: add a power request clear ARM: highbank: fix secondary boot and hotplug ARM: highbank: fix typos with hignbank in power request functions ARM: dts: fix highbank cpu mpidr values ARM: dts: add device_type prop to cpu nodes on Calxeda platforms ARM: mx5: Fix MX53 flexcan2 clock ARM: OMAP2+: am33xx-hwmod: Fix wrongly terminated am33xx_usbss_mpu_irqs array pinctrl: mvebu: make pdma clock on dove mandatory ARM: Dove: Add pinctrl clock to DT dma: mv_xor: fix error handling for clocks dma: mv_xor: fix error handling of mv_xor_channel_add() arm: mvebu: Add missing ; for cpu node. arm: mvebu: Armada XP MV78230 has only three Ethernet interfaces arm: mvebu: Armada XP MV78230 has two cores, not one clk: mvebu: Remove inappropriate __init tagging ARM: Kirkwood: Use fixed-regulator instead of board gpio call ARM: Kirkwood: Fix missing sdio clock ARM: Kirkwood: Switch TWSI1 of 88f6282 to DT clock providers ...
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