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path: root/drivers/crypto/qat/qat_common/adf_pfvf_pf_msg.h (follow)
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2021-12-24crypto: qat - exchange ring-to-service mappings over PFVFMarco Chiappero1-0/+2
In addition to retrieving the device capabilities, a VF may also need to retrieve the mapping of its ring pairs to crypto and or compression services in order to work properly. Make the VF receive the ring-to-service mappings from the PF by means of a new REQ_RING_SVC_MAP Block Message and add the request and response logic on VF and PF respectively. This change requires to bump the PFVF protocol to version 4. Signed-off-by: Marco Chiappero <marco.chiappero@intel.com> Reviewed-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com> Reviewed-by: Fiona Trahe <fiona.trahe@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2021-12-24crypto: qat - exchange device capabilities over PFVFMarco Chiappero1-0/+3
Allow the VF driver to get the supported device capabilities through PFVF, by adding a new block message, the Capability Summary. This messages allows to exchange the capability through masks, which report, depending on the Capability Summary version, up to the following information: - algorithms and/or services that are supported by the device (e.g. symmetric crypto, data compression, etc.) - (extended) compression capabilities, with details about the compression service (e.g. if compress and verify is supported by this device) - the frequency of the device This patch supports the latest Capabilities Summary version 3 for VFs, but will limit support for the PF driver to version 2. This change also increases the PFVF protocol to version 2. Signed-off-by: Marco Chiappero <marco.chiappero@intel.com> Reviewed-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com> Reviewed-by: Fiona Trahe <fiona.trahe@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2021-12-24crypto: qat - introduce support for PFVF block messagesMarco Chiappero1-0/+3
GEN2 devices use a single CSR for PFVF messages, which leaves up to 10 bits of payload per single message. While such amount is sufficient for the currently defined messages, the transfer of bigger and more complex data streams from the PF to the VF requires a new mechanism that extends the protocol. This patch adds a new layer on top of the basic PFVF messaging, called Block Messages, to encapsulate up to 126 bytes of data in a single logical message across multiple PFVF messages of new types (SMALL, MEDIUM and LARGE BLOCK), including (sub)types (BLKMSG_TYPE) to carry the information about the actual Block Message. Regardless of the size, each Block Message uses a two bytes header, containing the version and size, to allow for extension while maintaining compatibility. The size and the types of Block Messages are defined as follow: - small block messages: up to 16 BLKMSG types of up to 30 bytes - medium block messages: up to 8 BLKMSG types of up to 62 bytes - large block messages: up to 4 BLKMSG types of up to 126 bytes It effectively works as reading a byte at a time from a block device and for each of these new Block Messages: - the requestor (always a VF) can either request a specific byte of the larger message, in order to retrieve the full message, or request the value of the CRC calculated for a specific message up to the provided size (to allow for messages to grow while maintaining forward compatibility) - the responder (always the PF) will either return a single data or CRC byte, along with the indication of response type (or error). This patch provides the basic infrastructure to perform the above operations, without defining any new message. As CRCs are required, this code now depends on the CRC8 module. Note: as a consequence of the Block Messages design, sending multiple PFVF messages in bursts, the interrupt rate limiting values on the PF are increased. Signed-off-by: Marco Chiappero <marco.chiappero@intel.com> Co-developed-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com> Signed-off-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com> Reviewed-by: Fiona Trahe <fiona.trahe@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2021-11-26crypto: qat - reorganize PFVF codeMarco Chiappero1-0/+10
Reorganize the structure of the PFVF code by moving the content of adf_pf2vf_msg.c and adf_vf2pf_msg.c. The logic that handles high level messages has been moved to adf_pfvf_pf_msg.c and adf_pfvf_vf_msg.c. The implementation of low level communication primitives and the protocol is now included in adf_pfvf_pf_proto.c and adf_pfvf_vf_proto.c. In addition, the file adf_pf2vf_msg.h has been renamed in adf_pfvf_msg.h since it common to PF and VF and the copyright date for the touched files has been updated. Signed-off-by: Marco Chiappero <marco.chiappero@intel.com> Co-developed-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com> Signed-off-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>