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2022-05-19dmaengine: sun6i: Add support for the D1 variantSamuel Holland1-0/+1
So far it appears to match the configuration of the A100 variant. Since D1 is a RISC-V chip, it does not meet any of the existing dependencies for this driver, so relax the dependency somewhat. Acked-by: Maxime Ripard <maxime@cerno.tech> Signed-off-by: Samuel Holland <samuel@sholland.org> Link: https://lore.kernel.org/r/20220424172759.33383-5-samuel@sholland.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-05-19dmaengine: sun6i: Add support for 34-bit physical addressesSamuel Holland1-15/+38
Recent Allwinner SoCs support >4 GiB of DRAM, so those variants of the DMA engine support >32 bit physical addresses. This is accomplished by placing the high bits in the "para" word in the DMA descriptor. DMA descriptors themselves can be located at >32 bit addresses by putting the high bits in the LSBs of the descriptor address register, taking advantage of the required DMA descriptor alignment. However, support for this is not really necessary, so we can avoid the complication by allocating them from the DMA_32 zone. Signed-off-by: Samuel Holland <samuel@sholland.org> Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://lore.kernel.org/r/20220424172759.33383-4-samuel@sholland.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-05-19dmaengine: sun6i: Do not use virt_to_physSamuel Holland1-19/+19
This breaks on RISC-V, because dma_pool_alloc returns addresses which are not in the linear map. Instead, plumb through the physical address which is already known anyway. Acked-by: Maxime Ripard <maxime@cerno.tech> Signed-off-by: Samuel Holland <samuel@sholland.org> Link: https://lore.kernel.org/r/20220424172759.33383-3-samuel@sholland.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-11-18dmaengine: sun6i: Add support for A100 DMAYangtao Li1-0/+25
The dma of a100 is similar to h6, with some minor changes to support greater addressing capabilities. Add support for it. Signed-off-by: Yangtao Li <frank@allwinnertech.com> Link: https://lore.kernel.org/r/719852c6a9a597bd2e82d01a268ca02b9dee826c.1604988979.git.frank@allwinnertech.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-09-18dmaengine: sun6i: convert tasklets to use new tasklet_setup() APIAllen Pais1-3/+3
In preparation for unconditionally passing the struct tasklet_struct pointer to all tasklet callbacks, switch to using the new tasklet_setup() and from_tasklet() to pass the tasklet pointer explicitly. Signed-off-by: Romain Perier <romain.perier@gmail.com> Signed-off-by: Allen Pais <allen.lkml@gmail.com> Acked-by: Chen-Yu Tsai <wens@csie.org> Link: https://lore.kernel.org/r/20200831103542.305571-27-allen.lkml@gmail.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-07-31dmaengine: Remove dev_err() usage after platform_get_irq()Stephen Boyd1-3/+1
We don't need dev_err() messages when platform_get_irq() fails now that platform_get_irq() prints an error message itself when something goes wrong. Let's remove these prints with a simple semantic patch. // <smpl> @@ expression ret; struct platform_device *E; @@ ret = ( platform_get_irq(E, ...) | platform_get_irq_byname(E, ...) ); if ( \( ret < 0 \| ret <= 0 \) ) { ( -if (ret != -EPROBE_DEFER) -{ ... -dev_err(...); -... } | ... -dev_err(...); ) ... } // </smpl> While we're here, remove braces on if statements that only have one statement (manually). Cc: Vinod Koul <vkoul@kernel.org> Cc: Dan Williams <dan.j.williams@intel.com> Cc: dmaengine@vger.kernel.org Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Stephen Boyd <swboyd@chromium.org> Link: https://lore.kernel.org/r/20190730181557.90391-11-swboyd@chromium.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-07-17Merge tag 'dmaengine-5.3-rc1' of git://git.infradead.org/users/vkoul/slave-dmaLinus Torvalds1-35/+112
Pull dmaengine updates from Vinod Koul: - Add support in dmaengine core to do device node checks for DT devices and update bunch of drivers to use that and remove open coding from drivers - New driver/driver support for new hardware, namely: - MediaTek UART APDMA - Freescale i.mx7ulp edma2 - Synopsys eDMA IP core version 0 - Allwinner H6 DMA - Updates to axi-dma and support for interleaved cyclic transfers - Greg's debugfs return value check removals on drivers - Updates to stm32-dma, hsu, dw, pl330, tegra drivers * tag 'dmaengine-5.3-rc1' of git://git.infradead.org/users/vkoul/slave-dma: (68 commits) dmaengine: Revert "dmaengine: fsl-edma: add i.mx7ulp edma2 version support" dmaengine: at_xdmac: check for non-empty xfers_list before invoking callback Documentation: dmaengine: clean up description of dmatest usage dmaengine: tegra210-adma: remove PM_CLK dependency dmaengine: fsl-edma: add i.mx7ulp edma2 version support dt-bindings: dma: fsl-edma: add new i.mx7ulp-edma dmaengine: fsl-edma-common: version check for v2 instead dmaengine: fsl-edma-common: move dmamux register to another single function dmaengine: fsl-edma: add drvdata for fsl-edma dmaengine: Revert "dmaengine: fsl-edma: support little endian for edma driver" dmaengine: rcar-dmac: Reject zero-length slave DMA requests dmaengine: dw: Enable iDMA 32-bit on Intel Elkhart Lake dmaengine: dw-edma: fix semicolon.cocci warnings dmaengine: sh: usb-dmac: Use [] to denote a flexible array member dmaengine: dmatest: timeout value of -1 should specify infinite wait dmaengine: dw: Distinguish ->remove() between DW and iDMA 32-bit dmaengine: fsl-edma: support little endian for edma driver dmaengine: hsu: Revert "set HSU_CH_MTSR to memory width" dmagengine: pl330: add code to get reset property dt-bindings: pl330: document the optional resets property ...
2019-06-04dmaengine: sun6i: Add support for H6 DMAJernej Skrabec1-0/+40
H6 DMA has more than 32 supported DRQs, which means that configuration register is slightly rearranged. It also needs additional clock to be enabled. Add support for it. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Signed-off-by: Clément Péron <peron.clem@gmail.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-06-04dmaengine: sun6i: Add a quirk for setting mode fieldsJernej Skrabec1-19/+27
H6 DMA has mode fields in different position than any other currently supported DMA controller. Add a quirk for that. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Signed-off-by: Clément Péron <peron.clem@gmail.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-06-04dmaengine: sun6i: Add a quirk for setting DRQ fieldsJernej Skrabec1-20/+28
H6 DMA has more than 32 possible DRQs. That means that current maximum of 31 DRQs is not enough anymore. Add a quirk which will set source and destination DRQ number. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Signed-off-by: Clément Péron <peron.clem@gmail.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-06-04dmaengine: sun6i: Add a quirk for additional mbus clockJernej Skrabec1-1/+22
H6 DMA controller needs additional mbus clock to be enabled. Add a quirk for it and handle it accordingly. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Signed-off-by: Clément Péron <peron.clem@gmail.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-05-30treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152Thomas Gleixner1-5/+1
Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 3029 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190527070032.746973796@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-10-23dmaengine: sun6i: Retrieve channel count/max request from devicetreeStefan Brüns1-1/+26
To avoid introduction of a new compatible for each small SoC/DMA controller variation, move the definition of the channel count to the devicetree. The number of vchans is no longer explicit, but limited by the highest port/DMA request number. The result is a slight overallocation for SoCs with a sparse port mapping. Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-10-16dmaengine: sun6i: Add support for Allwinner A64 and compatiblesStefan Brüns1-0/+20
The A64 SoC has the same dma engine as the H3 (sun8i), with a reduced amount of physical channels. To allow future reuse of the compatible, leave the channel count etc. in the config data blank and retrieve it from the devicetree. Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-10-16dmaengine: sun6i: Move number of pchans/vchans/request to device structStefan Brüns1-10/+16
Preparatory patch: If the same compatible is used for different SoCs which have a common register layout, but different number of channels, the channel count can no longer be stored in the config. Store it in the device structure instead. Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-10-16dmaengine: sun6i: Enable additional burst lengths/widths on H3Stefan Brüns1-9/+45
The H3 supports bursts lengths of 1, 4, 8 and 16 transfers, each with a width of 1, 2, 4 or 8 bytes. The register value for the the width is log2-encoded, change the conversion function to provide the correct value for width == 8. Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-10-16dmaengine: sun6i: Restructure code to allow extension for new SoCsStefan Brüns1-28/+38
The current code mixes three distinct operations when transforming the slave config to register settings: 1. special handling of DMA_SLAVE_BUSWIDTH_UNDEFINED, maxburst == 0 2. range checking 3. conversion of raw to register values As the range checks depend on the specific SoC, move these out of the conversion to distinct operations. Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-10-16dmaengine: sun6i: Correct burst length field offsets for H3Stefan Brüns1-7/+27
For the H3, the burst lengths field offsets in the channel configuration register differs from earlier SoC generations. Using the A31 register macros actually configured the H3 controller do to bursts of length 1 always, which although working leads to higher bus utilisation. Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-10-16dmaengine: sun6i: Correct setting of clock autogating register for A83T/H3Stefan Brüns1-5/+23
The H83T uses a compatible string different from the A23, but requires the same clock autogating register setting. The H3 also requires setting the clock autogating register, but has the register at a different offset. Add three suitable callbacks for the existing controller generations and set it in the controller config structure. Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-09-21dmaengine: sun6i: use of_device_get_match_dataCorentin Labbe1-4/+2
The usage of of_device_get_match_data reduce the code size a bit. Furthermore, it prevents an improbable dereference when of_match_device() return NULL. Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-09-05dmaengine: sun6i: support V3s SoC variantIcenowy Zheng1-0/+13
Allwinner V3s has a DMA engine similar to the ones from A31, but with fewer channels and DRQs. Add support for it. Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> Acked-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-09-05dmaengine: sun6i: make gate bit in sun8i's DMA engines a common quirkIcenowy Zheng1-7/+13
Originally we enable a special gate bit when the compatible indicates A23/33. But according to BSP sources and user manuals, more SoCs will need this gate bit. So make it a common quirk configured in the config struct. Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2016-11-14dmaengine: sun6i: fix the uninitialized value for v_lliAxl-zhang1-1/+1
dma_pool_alloc does not initialize the value of the newly allocated block for the v_lli, and the uninitilize value make the tests failed which is on pine64 with dmatest. we can fix it just change the "|=" to "=" for the v_lli->cfg. Signed-off-by: Hao Zhang <hao5781286@gmail.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2016-09-26dmaengine: sun6i: Add support for Allwinner A83T (sun8i) variantJean-Francois Moine1-0/+7
The A83T SoC has the same dma engine as the A31 (sun6i), with a reduced amount of endpoints and physical channels. Signed-off-by: Jean-Francois Moine <moinejf@free.fr> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2016-06-21dmaengine: sun6i-dma: Only calculate residue if state exists.Peter Griffin1-1/+1
There is no point in calculating the residue if state does not exist to store the value. Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2016-05-02dmaengine: sun6i: Add cyclic capabilityJean-Francois Moine1-7/+122
DMA cyclic transfers are required by audio streaming. Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Jean-Francois Moine <moinejf@free.fr> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2016-05-02dmaengine: sun6i: Remove useless checkJean-Francois Moine1-5/+0
The transfer direction is now checked in set_config. There is no need to check it twice. Signed-off-by: Jean-Francois Moine <moinejf@free.fr> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2016-05-02dmaengine: sun6i: Set default maxburst size and bus widthJean-Francois Moine1-4/+24
Some DMA clients, as audio, don't set the maxburst size and bus width on the memory side when starting DMA transfers. This patch prevents such transfers to be aborted by providing system default values to the lacking ones. Signed-off-by: Jean-Francois Moine <moinejf@free.fr> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2016-04-26dmaengine: sun6i: Simplify lli settingJean-Francois Moine1-55/+47
Checking the DMA config before setting the lli list avoids to do tests inside the setting loop. Signed-off-by: Jean-Francois Moine <moinejf@free.fr> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2016-04-26dmaengine: sun6i: Fix impossible settings of burst and bus widthJean-Francois Moine1-5/+5
In the commit 1f9cd915b64bb95f ("dmaengine: sun6i: Fix memcpy operation"), the signed values returned by convert_burst() and convert_buswidth() were stored in an unsigned value. Then, these values were considered as errors when non null. As a result, DMA transfers were rejected when the burst or buswidth had values different from 1, as 8 for the burst or 4 for the bus width. Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Jean-Francois Moine <moinejf@free.fr> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2016-04-26dmaengine: sun6i: Fix the access of the IRQ registerJean-Francois Moine1-2/+2
The IRQ register number is computed, but this number was not used and the register was the one indexed by the channel index instead. Then, only the first DMA channel was working. Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Jean-Francois Moine <moinejf@free.fr> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-10-01dmaengine: sun6i: Fix module autoload for OF platform driverLuis de Bethencourt1-0/+1
This platform driver has a OF device ID table but the OF module alias information is not created so module autoloading won't work. Signed-off-by: Luis de Bethencourt <luisbg@osg.samsung.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-08-05dmaengine: Add an enum for the dmaengine alignment constraintsMaxime Ripard1-1/+1
Most drivers need to set constraints on the buffer alignment for async tx operations. However, even though it is documented, some drivers either use a defined constant that is not matching what the alignment variable expects (like DMA_BUSWIDTH_* constants) or fill the alignment in bytes instead of power of two. Add a new enum for these alignments that matches what the framework expects, and convert the drivers to it. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-05-08dmaengine: sun6i: Add support for Allwinner H3 (sun8i) variantJens Kuske1-0/+12
The H3 SoC has the same dma engine as the A31 (sun6i), with a reduced amount of endpoints and physical channels. Add the proper config data and compatible string to support it. Signed-off-by: Jens Kuske <jenskuske@gmail.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-03-18Merge branch 'topic/alloc_removal' into for-linusVinod Koul1-6/+0
2015-03-18dmaengine: sun6i: remove device_alloc_chan_resources handlerVinod Koul1-6/+0
Now that device_alloc_chan_resources handler in not mandatory, remove dummy implementations Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-03-18dmaengine: constify of_device_id arrayFabian Frederick1-1/+1
of_device_id is always used as const. (See driver.of_match_table and open firmware functions) Signed-off-by: Fabian Frederick <fabf@skynet.be> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2014-12-22dmaengine: sun6i: Declare slave capabilities for the generic codeMaxime Ripard1-1/+9
Now that the generic slave caps code can make use of the device assigned capabilities, instead of relying on a callback to be implemented. Make use of this code. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2014-12-22dmaengine: sun6i: Split device_controlMaxime Ripard1-72/+78
Split the device_control callback of the Allwinner A31 DMA driver to make use of the newly introduced callbacks, that will eventually be used to retrieve slave capabilities. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2014-12-12Merge branch 'for-linus' of git://git.infradead.org/users/vkoul/slave-dmaLinus Torvalds1-35/+87
Pull dmaengine updates from Vinod Koul: "Main features this time are: - BAM v1.3.0 support form qcom bam dma - support for Allwinner sun8i dma - atmels eXtended DMA Controller driver - chancnt cleanup by Maxime - fixes spread over drivers" * 'for-linus' of git://git.infradead.org/users/vkoul/slave-dma: (56 commits) dmaenegine: Delete a check before free_percpu() dmaengine: ioatdma: fix dma mapping errors dma: cppi41: add a delay while setting the TD bit dma: cppi41: wait longer for the HW to return the descriptor dmaengine: fsl-edma: fixup reg offset and hw S/G support in big-endian model dmaengine: fsl-edma: fix calculation of remaining bytes drivers/dma/pch_dma: declare pch_dma_id_table as static dmaengine: ste_dma40: fix error return code dma: imx-sdma: clarify about firmware not found error Documentation: devicetree: Fix Xilinx VDMA specification dmaengine: pl330: update author info dmaengine: clarify the issue_pending expectations dmaengine: at_xdmac: Add DMA_PRIVATE ARM: dts: at_xdmac: fix bad value of dma-cells in documentation dmaengine: at_xdmac: fix missing spin_unlock dmaengine: at_xdmac: fix a bug in transfer residue computation dmaengine: at_xdmac: fix software lockup at_xdmac_tx_status() dmaengine: at_xdmac: remove chancnt affectation dmaengine: at_xdmac: prefer usage of readl/writel_relaxed dmaengine: xdmac: fix print warning on dma_addr_t variable ...
2014-11-17dmaengine: sun6i: Add support for Allwinner A23 (sun8i) variantChen-Yu Tsai1-0/+27
The A23 SoC has the same dma engine as the A31 (sun6i), with a reduced amount of endpoints and physical channels. Add the proper config data and compatible string to support it. A slight difference in sun8i is an undocumented register needs to be toggled for dma to function. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2014-11-17dmaengine: sun6i: support parameterized compatible stringsChen-Yu Tsai1-34/+60
This patch adds support for hardware parameters tied to compatible strings, so similar hardware can reuse the driver. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2014-11-12dmaengine: sun6i: Fix memcpy operationMaxime Ripard1-31/+30
The prep_memcpy call was not setting any meaningful burst and width because it was relying on the dma_slave_config was not set already. Rework the needed conversion functions, and hardcode the width and burst to use. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Cc: stable@vger.kernel.org Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2014-11-06dmaengine: sun6i: Remove chancnt affectationsMaxime Ripard1-1/+0
chanctnt is already filled by dma_async_device_register, which uses the channel list to know how much channels there is. Since it's already filled, we can safely remove it from the drivers' probe function. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2014-09-24dmaengine: sun6i: Remove obsolete clk muxing codeChen-Yu Tsai1-23/+0
The sun6i DMA controller requires the AHB1 bus clock to be clocked from PLL6. This was originally done by the dmaengine driver during probe time. The AHB1 clock driver has since been unified, so the original code does not work. Remove the clk muxing code, and replace it with DT clk default properties. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2014-07-30dmaengine: sun6i: Fix memory leaksMaxime Ripard1-9/+12
The sun6i_dma_prep_memcpy and sun6i_dma_prep_slave_sg functions were both leaking the descriptor they allocated if an error was happening after a successful dma_pool_alloc call. It also fixes a memleak that was happening in the scatter gather list traversal, that was allocating as much descriptor as there was scatter gather items, but only freeing the current descriptor if an error was to arise. Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2014-07-30dmaengine: sun6i: Free the interrupt before killing the taskletMaxime Ripard1-2/+2
There's still a small window between the call to sun6i_kill_tasklet and the end of the driver remove function where a spurious interrupt might trigger, and start using deallocated resources. Replace the call to synchronize_irq by a free_irq, so that we're sure that we won't get any further interrupts when we're deallocating resources. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2014-07-30dmaengine: sun6i: Remove switch statement from buswidth convertion routineMaxime Ripard1-12/+3
Since the conversion routine is quite trivial, we don't need this switch, and we can just use a simple calculation. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2014-07-28dmaengine: sun61: fix warning on bad print specfierVinod Koul1-2/+2
The sg_dma_len() returns unsigned int but we had driver print it as %zu, use %u as documented in Documentation/printk-formats.txt drivers/dma/sun6i-dma.c: In function ‘sun6i_dma_prep_slave_sg’: drivers/dma/sun6i-dma.c:643: warning: format ‘%zu’ expects type ‘size_t’, but argument 8 has type ‘unsigned int’ drivers/dma/sun6i-dma.c:661: warning: format ‘%zu’ expects type ‘size_t’, but argument 8 has type ‘unsigned int’ Reported-by: kbuild test robot <fengguang.wu@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2014-07-28dmaengine: sun6i: fix build failure on x86, xilinx targetsVinod Koul1-2/+2
Since the driver defined COMPILE_TEST, it gets compiled for different arch's The driver uses __virt_to_phys() insteadof virt_to_phys, so replace it drivers/dma/sun6i-dma.c: In function ‘sun6i_dma_dump_chan_regs’: drivers/dma/sun6i-dma.c:203: error: implicit declaration of function '__virt_to_phys' Reported-by: kbuild test robot <fengguang.wu@intel.com> Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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