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2019-06-20EDAC/sifive: Add EDAC platform driver for SiFive SoCsYash Shah1-0/+6
Add an EDAC driver for SiFive SoCs. The initial version supports ECC event monitoring and reporting through the EDAC framework for the SiFive L2 cache controller. It registers for notifier events from the L2 cache controller driver (arch/riscv/mm/sifive_l2_cache.c) for L2 ECC events. [ bp: Massage commit message. ] Signed-off-by: Yash Shah <yash.shah@sifive.com> Signed-off-by: Borislav Petkov <bp@suse.de> Reviewed-by: James Morse <james.morse@arm.com> Cc: Albert Ou <aou@eecs.berkeley.edu> Cc: "David S. Miller" <davem@davemloft.net> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Jonathan Cameron <Jonathan.Cameron@huawei.com> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: linux-edac <linux-edac@vger.kernel.org> Cc: linux-riscv@lists.infradead.org Cc: Mauro Carvalho Chehab <mchehab@kernel.org> Cc: Nicolas Ferre <nicolas.ferre@microchip.com> Cc: Palmer Dabbelt <palmer@sifive.com> Cc: "Paul E. McKenney" <paulmck@linux.ibm.com> Cc: Paul Walmsley <paul.walmsley@sifive.com> Cc: sachin.ghadi@sifive.com Link: https://lkml.kernel.org/r/1557142026-15949-2-git-send-email-yash.shah@sifive.com
2019-05-10EDAC/mpc85xx: Prevent building as a moduleMichael Ellerman1-2/+2
The mpc85xx EDAC driver can be configured as a module but then fails to build because it uses two unexported symbols: ERROR: ".pci_find_hose_for_OF_device" [drivers/edac/mpc85xx_edac_mod.ko] undefined! ERROR: ".early_find_capability" [drivers/edac/mpc85xx_edac_mod.ko] undefined! We don't want to export those symbols just for this driver, so make the driver only configurable as a built-in. This seems to have been broken since at least c92132f59806 ("edac/85xx: Add PCIe error interrupt edac support") (Nov 2013). [ bp: make it depend on EDAC=y so that the EDAC core doesn't get built as a module. ] Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Signed-off-by: Borislav Petkov <bp@suse.de> Acked-by: Johannes Thumshirn <jth@kernel.org> Cc: James Morse <james.morse@arm.com> Cc: Mauro Carvalho Chehab <mchehab@kernel.org> Cc: linux-edac <linux-edac@vger.kernel.org> Cc: linuxppc-dev@ozlabs.org Cc: morbidrsa@gmail.com Link: https://lkml.kernel.org/r/20190502141941.12927-1-mpe@ellerman.id.au
2019-02-26EDAC/altera: Add separate SDRAM EDAC configThor Thayer1-3/+11
The CONFIG_ALTERA_EDAC Kconfig symbol always enables the SDRAM EDAC functionality. On the newer architectures, however, there are cases where the peripheral EDAC functionality is enabled but SDRAM needs to be disabled. Move SDRAM functions so they can be contained inside the conditional CONFIG. Create new CONFIG option just for SDRAM. [ bp: Massage commit message. ] Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com> Signed-off-by: Borislav Petkov <bp@suse.de> Cc: James Morse <james.morse@arm.com> Cc: Mauro Carvalho Chehab <mchehab@kernel.org> Cc: dinguyen@kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-edac <linux-edac@vger.kernel.org> Cc: linux@armlinux.org.uk Link: https://lkml.kernel.org/r/1551121006-4657-2-git-send-email-thor.thayer@linux.intel.com
2019-02-06EDAC, i10nm: Fix randconfig buildsTony Luck1-2/+2
I10NM_EDAC depends on CONFIG_ACPI so make that dependency explicit. Reported-by: Borislav Petkov <bp@suse.de> Signed-off-by: Tony Luck <tony.luck@intel.com> Signed-off-by: Borislav Petkov <bp@suse.de> Cc: Aristeu Rozanski <aris@redhat.com> Cc: James Morse <james.morse@arm.com> Cc: Mauro Carvalho Chehab <mchehab@kernel.org> Cc: Qiuxu Zhuo <qiuxu.zhuo@intel.com> Cc: linux-edac <linux-edac@vger.kernel.org> Link: https://lkml.kernel.org/r/20190205180200.26865-1-tony.luck@intel.com
2019-02-02EDAC, i10nm: Add a driver for Intel 10nm server processorsQiuxu Zhuo1-0/+12
This driver supports the Intel 10nm series server integrated memory controller. It gets the memory capacity and topology information by reading the registers in PCI configuration space and memory-mapped I/O. It decodes the memory error address to the platform specific address by using the ACPI Address Translation (ADXL) Device Specific Method (DSM). Co-developed-by: Tony Luck <tony.luck@intel.com> Signed-off-by: Qiuxu Zhuo <qiuxu.zhuo@intel.com> Signed-off-by: Tony Luck <tony.luck@intel.com> Signed-off-by: Borislav Petkov <bp@suse.de> Cc: James Morse <james.morse@arm.com> Cc: Mauro Carvalho Chehab <mchehab@kernel.org> Cc: linux-edac <linux-edac@vger.kernel.org> Link: https://lkml.kernel.org/r/20190130191519.15393-5-tony.luck@intel.com
2019-01-18EDAC, aspeed: Add an Aspeed AST2500 EDAC driverStefan M Schaeckeler1-0/+9
Add support for the Aspeed AST2500 SoC. Signed-off-by: Stefan M Schaeckeler <sschaeck@cisco.com> Signed-off-by: Borislav Petkov <bp@suse.de> Cc: Andrew Jeffery <andrew@aj.id.au> Cc: Joel Stanley <joel@jms.id.au> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mauro Carvalho Chehab <mchehab@kernel.org> Cc: Rob Herring <robh+dt@kernel.org> Cc: devicetree@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-aspeed@lists.ozlabs.org Cc: linux-edac <linux-edac@vger.kernel.org> Link: https://lkml.kernel.org/r/1547743097-5236-2-git-send-email-schaecsn@gmx.net
2018-11-07EDAC, skx: Fix randconfig builds in a better wayLuck, Tony1-2/+2
It was previously noted that Kconfig complained about unmet dependencies when trying to configure skx_edac together with CONFIG_ACPI=n. First fix for this checked for ACPI when doing select ACPI_ADXL but this required stub functions for the case where ACPI wasn't selected. It also allowed building a driver that didn't actually work for a system that has non-volatile DIMMs. Arnd Bergmann pointed out that the right fix is to make EDAC_SKX "depend on ACPI". Fixes: a324e9396ca3 ("EDAC, skx: Fix randconfig builds") Signed-off-by: Tony Luck <tony.luck@intel.com> Signed-off-by: Borislav Petkov <bp@suse.de> CC: "Rafael J. Wysocki" <rafael.j.wysocki@intel.com> CC: Arnd Bergmann <arnd@arndb.de> CC: Mauro Carvalho Chehab <mchehab@kernel.org> CC: linux-edac <linux-edac@vger.kernel.org> CC: qiuxu.zhuo@intel.com Link: http://lkml.kernel.org/r/20181106183914.GA26731@agluck-desk
2018-11-06EDAC, synopsys: Add ECC support for ZynqMP DDR controllerManish Narani1-1/+1
Add ECC support for ZynqMP DDR controller IP. The IP supports interrupts for corrected and uncorrected errors. Add interrupt handlers for the same. Signed-off-by: Manish Narani <manish.narani@xilinx.com> Signed-off-by: Borislav Petkov <bp@suse.de> CC: Mauro Carvalho Chehab <mchehab@kernel.org> CC: Michal Simek <michal.simek@xilinx.com> CC: amit.kucheria@linaro.org CC: devicetree@vger.kernel.org CC: leoyang.li@nxp.com CC: linux-arm-kernel@lists.infradead.org CC: linux-edac <linux-edac@vger.kernel.org> CC: mark.rutland@arm.com CC: robh+dt@kernel.org CC: sudeep.holla@arm.com Link: http://lkml.kernel.org/r/1540447621-22870-5-git-send-email-manish.narani@xilinx.com
2018-11-02Merge tag 'edac_for_4.20_2' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bpLinus Torvalds1-0/+1
Pull more EDAC updates from Borislav Petkov: "The second part of the EDAC pile which contains the ADXL user and a build fix which addresses a not-so-sensical .config but fixes randconfig builds people do: - skx_edac: Address translation for NVDIMMs (Tony Luck and Qiuxu Zhuo) - ACPI_ADXL build fix" [ I don't think "sensical" is a word, particularly when used in the context of actually meaning "nonsensical", but I like it - Linus ] * tag 'edac_for_4.20_2' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp: EDAC, skx: Fix randconfig builds EDAC, skx_edac: Add address translation for non-volatile DIMMs
2018-10-31EDAC, skx: Fix randconfig buildsBorislav Petkov1-1/+1
The driver depends on the ADXL component glue and selects it. However, ADXL itself implicitly depends on ACPI and in nonsensical randconfig builds like this: # CONFIG_ACPI is not set CONFIG_ACPI_ADXL=y where ACPI is not enabled, the build fails with: drivers/edac/skx_edac.o: In function `skx_mce_check_error': skx_edac.c:(.text+0xab): undefined reference to `adxl_decode' drivers/edac/skx_edac.o: In function `skx_init': skx_edac.c:(.init.text+0x8bf): undefined reference to `adxl_get_component_names' make: *** [vmlinux] Error 1 Add stubs for that case so that the build succeeds. CONFIG_ACPI=n doesn't make any sense for real configurations but this fix will at least silence randconfig builds. Signed-off-by: Borislav Petkov <bp@suse.de> Acked-by: Tony Luck <tony.luck@intel.com> Cc: "Rafael J. Wysocki" <rafael@kernel.org>
2018-10-25EDAC, skx_edac: Add address translation for non-volatile DIMMsQiuxu Zhuo1-0/+1
Currently, this driver doesn't support address translation for non-volatile DIMMs. The ACPI ADXL DSM method provides address translation for both volatile and non-volatile DIMMs. Enable it to use the ACPI DSM methods if they are supported and there are non-volatile DIMMs populated on the system. Co-developed-by: Tony Luck <tony.luck@intel.com> Signed-off-by: Qiuxu Zhuo <qiuxu.zhuo@intel.com> Signed-off-by: Borislav Petkov <bp@suse.de> CC: Mauro Carvalho Chehab <mchehab@kernel.org> CC: arozansk@redhat.com CC: linux-edac <linux-edac@vger.kernel.org> Link: http://lkml.kernel.org/r/1540106336-5212-1-git-send-email-qiuxu.zhuo@intel.com
2018-09-13drivers: edac: Add EDAC driver support for QCOM SoCsChannagoud Kadabi1-0/+14
Add error reporting driver for Single Bit Errors (SBEs) and Double Bit Errors (DBEs). As of now, this driver supports error reporting for Last Level Cache Controller (LLCC) of Tag RAM and Data RAM. Interrupts are triggered when the errors happen in the cache, the driver handles those interrupts and dumps the syndrome registers. Signed-off-by: Channagoud Kadabi <ckadabi@codeaurora.org> Signed-off-by: Venkata Narendra Kumar Gutta <vnkgutta@codeaurora.org> Co-developed-by: Venkata Narendra Kumar Gutta <vnkgutta@codeaurora.org> Acked-by: Borislav Petkov <bp@suse.de> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-05-14EDAC, skx: Fix skx_edac build error when ACPI_NFIT=mRandy Dunlap1-0/+1
Prevent build error when CONFIG_ACPI_NFIT=m and CONFIG_EDAC_SKX=y by limiting EDAC_SKX based on how ACPI_NFIT is set. Fixes this build error: drivers/edac/skx_edac.o: In function `get_nvdimm_info': ../drivers/edac/skx_edac.c:399: undefined reference to `nfit_get_smbios_id' Reported-by: kbuild test robot <lkp@intel.com> Signed-off-by: Randy Dunlap <rdunlap@infradead.org> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Tony Luck <tony.luck@intel.com> Cc: linux-edac <linux-edac@vger.kernel.org> Fixes: 58ca9ac1463d ("EDAC, skx_edac: Detect non-volatile DIMMs") Link: http://lkml.kernel.org/r/3af91354-8e19-d2af-1bba-ced8dce053f1@infradead.org Signed-off-by: Borislav Petkov <bp@suse.de>
2018-05-12EDAC, altera: Add support for Stratix10 SDRAM EDACThor Thayer1-1/+1
Support for Stratix10 SDRAM ECC requires the use of SMC calls to Secure Monitor for accessing registers. Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com> Cc: Mauro Carvalho Chehab <mchehab@kernel.org> Cc: catalin.marinas@arm.com Cc: devicetree@vger.kernel.org Cc: dinguyen@kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-edac <linux-edac@vger.kernel.org> Cc: mark.rutland@arm.com Cc: robh+dt@kernel.org Cc: will.deacon@arm.com Link: http://lkml.kernel.org/r/1524854238-19394-3-git-send-email-thor.thayer@linux.intel.com Signed-off-by: Borislav Petkov <bp@suse.de>
2018-04-05Merge tag 'edac_for_4.17' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bpLinus Torvalds1-2/+5
Pull EDAC updates from Borislav Petkov: "Noteworthy is the NVDIMM support: - NVDIMM support to EDAC (Tony Luck) - misc fixes" * tag 'edac_for_4.17' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp: EDAC, sb_edac: Remove variable length array usage EDAC, skx_edac: Detect non-volatile DIMMs firmware, DMI: Add function to look up a handle and return DIMM size acpi, nfit: Add function to look up nvdimm device and provide SMBIOS handle EDAC: Add new memory type for non-volatile DIMMs EDAC: Drop duplicated array of strings for memory type names EDAC, layerscape: Allow building for LS1021A
2018-03-26edac: remove tile driverArnd Bergmann1-8/+0
The Tile architecture is obsolete and getting removed from the kernel, this driver appears to only be used there, and not on the ARM based successors (Tile-Mx, BlueField), so we should remove it as well. Acked-by: Borislav Petkov <bp@suse.de> Acked-by: Mauro Carvalho Chehab <mchehab@s-opensource.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2018-03-15EDAC, skx_edac: Detect non-volatile DIMMsTony Luck1-1/+4
This just covers the topology function of the EDAC driver. We locate which DIMM slots are populated with NVDIMMs and query the NFIT and SMBIOS tables to get the size. Reviewed-by: Jean Delvare <jdelvare@suse.de> Signed-off-by: Tony Luck <tony.luck@intel.com> Cc: Aristeu Rozanski <aris@redhat.com> Cc: Dan Williams <dan.j.williams@intel.com> Cc: Len Brown <lenb@kernel.org> Cc: Mauro Carvalho Chehab <mchehab@kernel.org> Cc: Qiuxu Zhuo <qiuxu.zhuo@intel.com> Cc: "Rafael J. Wysocki" <rjw@rjwysocki.net> Cc: linux-acpi@vger.kernel.org Cc: linux-edac <linux-edac@vger.kernel.org> Cc: linux-nvdimm@lists.01.org Link: http://lkml.kernel.org/r/20180312182430.10335-6-tony.luck@intel.com Signed-off-by: Borislav Petkov <bp@suse.de>
2018-02-27EDAC, layerscape: Allow building for LS1021ARasmus Villemoes1-1/+1
The LS1021A has a memory controller supported by this driver. It builds just fine, and I've done some rudimentary testing using the error injection facility, which suggests that it is indeed working. Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Acked-by: York Sun <york.sun@nxp.com> Cc: Alexander Stein <alexander.stein@systec-electronic.com> Cc: linux-edac <linux-edac@vger.kernel.org> Link: http://lkml.kernel.org/r/20180220150912.2954-1-rasmus.villemoes@prevas.dk Signed-off-by: Borislav Petkov <bp@suse.de>
2017-11-27EDAC, ti: Add support for TI keystone and DRA7xx EDACTero Kristo1-0/+7
TI Keystone and DRA7xx SoCs have support for EDAC on DDR3 memory that can correct one bit errors and detect two bit errors. Add EDAC driver for this feature which plugs into the generic kernel EDAC framework. Signed-off-by: Tero Kristo <t-kristo@ti.com> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-edac <linux-edac@vger.kernel.org> Cc: linux-omap@vger.kernel.org Link: http://lkml.kernel.org/r/1510578490-14510-1-git-send-email-t-kristo@ti.com [ Add SPDX tag and make _emif_get_id() use edac_printk(). ] Signed-off-by: Borislav Petkov <bp@suse.de>
2017-04-27EDAC, ghes: Do not enable it by defaultBorislav Petkov1-1/+0
Leave it to the user to decide whether to enable this or not. Otherwise, platform-specific drivers won't initialize (currently, EDAC supports only a single platform driver loaded). Signed-off-by: Borislav Petkov <bp@suse.de>
2017-04-10EDAC: Update Kconfig help textBorislav Petkov1-14/+4
Remove the old URLs. Signed-off-by: Borislav Petkov <bp@suse.de>
2017-04-10EDAC: Remove EDAC_MM_EDACBorislav Petkov1-58/+43
Move all the EDAC core functionality behind CONFIG_EDAC and get rid of that indirection. Update defconfigs which had it. While at it, fix dependencies such that EDAC depends on RAS for the tracepoints. Signed-off-by: Borislav Petkov <bp@suse.de> Cc: linux-arm-kernel@lists.infradead.org Cc: linuxppc-dev@lists.ozlabs.org Cc: Chris Metcalf <cmetcalf@mellanox.com> Cc: linux-edac@vger.kernel.org
2017-03-27EDAC, thunderx: Add Cavium ThunderX EDAC driverSergey Temerkhanov1-0/+11
Add support for Cavium ThunderX EDAC capable on-chip peripherals, namely the DRAM controller (LMC), cache coherent processor interconnect (CCPI) and level 2 cache blocks (L2C-TAD, L2C-MCI, L2C-CBC) Signed-off-by: Sergey Temerkhanov <s.temerkhanov@gmail.com> Cc: David.Daney@cavium.com Cc: Jan.Glauber@cavium.com Cc: linux-edac <linux-edac@vger.kernel.org> Link: http://lkml.kernel.org/r/20170324222837.60583-1-s.temerkhanov@gmail.com Signed-off-by: Borislav Petkov <bp@suse.de>
2017-03-23EDAC: Select DEBUG_FSBorislav Petkov1-0/+1
The debugfs.c functionality relies on DEBUG_FS so select it. Signed-off-by: Borislav Petkov <bp@suse.de>
2017-03-16EDAC, pnd2_edac: Add new EDAC driver for Intel SoC platformsTony Luck1-0/+9
Initial target for this driver is the Intel Apollo Lake platform and Denverton micro-server, they use the same internal memory controller IP called Pondicherry2. Memory controller registers are not in PCI config space like earlier Intel memory controllers. For Apollo Lake platform they are accessed via a "side-band" interface, for Denverton micro-server they are access via PCI config space and memory map I/O. This driver is for Apollo Lake and Denverton, but only the Denverton is fully enabled while we wait for the sideband driver. Apollo lake driver and initial cut at Denverton driver by Tony Luck. Extensive cleanup, refactoring and basic verification by Qiuxu Zhuo. Signed-off-by: Tony Luck <tony.luck@intel.com> Signed-off-by: Qiuxu Zhuo <qiuxu.zhuo@intel.com> Cc: linux-edac <linux-edac@vger.kernel.org> Link: http://lkml.kernel.org/r/20170308174539.14432-1-qiuxu.zhuo@intel.com Signed-off-by: Borislav Petkov <bp@suse.de>
2016-10-04Merge tag 'edac_for_4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bpLinus Torvalds1-0/+42
Pull EDAC updates from Borislav Petkov: "A lot of movement in the EDAC tree this time around, coarse summary below: - Altera Arria10 enablement of NAND, DMA, USB, QSPI and SD-MMC FIFO buffers (Thor Thayer) - split the memory controller part out of mpc85xx and share it with a new Freescale ARM Layerscape driver (York Sun) - amd64_edac fixes (Yazen Ghannam) - misc cleanups, refactoring and fixes all over the place" * tag 'edac_for_4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp: (37 commits) EDAC, altera: Add IRQ Flags to disable IRQ while handling EDAC, altera: Correct EDAC IRQ error message EDAC, amd64: Autoload module using x86_cpu_id EDAC, sb_edac: Remove NULL pointer check on array pci_tad EDAC: Remove NO_IRQ from powerpc-only drivers EDAC, fsl_ddr: Fix error return code in fsl_mc_err_probe() EDAC, fsl_ddr: Add entry to MAINTAINERS EDAC: Move Doug Thompson to CREDITS EDAC, I3000: Orphan driver EDAC, fsl_ddr: Replace simple_strtoul() with kstrtoul() EDAC, layerscape: Add Layerscape EDAC support EDAC, fsl_ddr: Fix IRQ dispose warning when module is removed EDAC, fsl_ddr: Add support for little endian EDAC, fsl_ddr: Add missing DDR DRAM types EDAC, fsl_ddr: Rename macros and names EDAC, fsl-ddr: Separate FSL DDR driver from MPC85xx EDAC, mpc85xx: Replace printk() with pr_* format EDAC, mpc85xx: Drop setting/clearing RFXE bit in HID1 EDAC, altera: Rename MC trigger to common name EDAC, altera: Rename device trigger to common name ...
2016-09-01EDAC, layerscape: Add Layerscape EDAC supportYork Sun1-0/+7
Add DDR EDAC driver for ARM-based compatible controllers. Both big-endian and little-endian are supported, as specified in device tree. Signed-off-by: York Sun <york.sun@nxp.com> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-edac <linux-edac@vger.kernel.org> Link: http://lkml.kernel.org/r/1471990465-27443-1-git-send-email-york.sun@nxp.com Signed-off-by: Borislav Petkov <bp@suse.de>
2016-08-21EDAC, skx_edac: Add EDAC driver for SkylakeTony Luck1-0/+8
This is an entirely new driver instead of yet another set of patches to sb_edac.c because: 1) Mapping from PCI devices to socket/memory controller is significantly different. Skylake scatters devices on a socket across a number of PCI buses. 2) There is an extra level of interleaving via the "mcroute" register that would be a little messy to squeeze into the old driver. 3) Validation is getting too expensive. Changes to sb_edac need to be checked against Sandy Bridge, Ivy Bridge, Haswell, Broadwell and Knights Landing. Acked-by: Aristeu Rozanski <aris@redhat.com> Acked-by: Borislav Petkov <bp@suse.de> Signed-off-by: Tony Luck <tony.luck@intel.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2016-08-10EDAC, altera: Add Arria10 SD-MMC EDAC supportThor Thayer1-0/+7
Add Altera Arria10 SD-MMC FIFO memory EDAC support. The SD-MMC is a dual port RAM implementation which is different than any of the other peripherals and therefore requires additional code. Signed-off-by: Thor Thayer <tthayer@opensource.altera.com> Cc: dinguyen@opensource.altera.com Cc: linux-arm-kernel@lists.infradead.org Cc: linux-edac <linux-edac@vger.kernel.org> Link: http://lkml.kernel.org/r/1470753653-23465-3-git-send-email-tthayer@opensource.altera.com Signed-off-by: Borislav Petkov <bp@suse.de>
2016-08-08EDAC, altera: Add Arria10 QSPI supportThor Thayer1-0/+7
Add Altera Arria10 QSPI FIFO memory support. Signed-off-by: Thor Thayer <tthayer@opensource.altera.com> Cc: dinguyen@opensource.altera.com Cc: linux-arm-kernel@lists.infradead.org Cc: linux-edac <linux-edac@vger.kernel.org> Link: http://lkml.kernel.org/r/1468512408-5156-9-git-send-email-tthayer@opensource.altera.com Signed-off-by: Borislav Petkov <bp@suse.de>
2016-08-08EDAC, altera: Add Arria10 USB supportThor Thayer1-0/+7
Add Altera Arria10 USB FIFO memory support. Signed-off-by: Thor Thayer <tthayer@opensource.altera.com> Cc: dinguyen@opensource.altera.com Cc: linux-arm-kernel@lists.infradead.org Cc: linux-edac <linux-edac@vger.kernel.org> Link: http://lkml.kernel.org/r/1468512408-5156-8-git-send-email-tthayer@opensource.altera.com Signed-off-by: Borislav Petkov <bp@suse.de>
2016-08-08EDAC, altera: Add Arria10 DMA supportThor Thayer1-0/+7
Add Altera Arria10 DMA FIFO memory support. Signed-off-by: Thor Thayer <tthayer@opensource.altera.com> Cc: dinguyen@opensource.altera.com Cc: linux-arm-kernel@lists.infradead.org Cc: linux-edac <linux-edac@vger.kernel.org> Link: http://lkml.kernel.org/r/1468512408-5156-7-git-send-email-tthayer@opensource.altera.com Signed-off-by: Borislav Petkov <bp@suse.de>
2016-08-08EDAC, altera: Add Arria10 NAND supportThor Thayer1-0/+7
Add Altera Arria10 NAND FIFO memory support. Signed-off-by: Thor Thayer <tthayer@opensource.altera.com> Cc: dinguyen@opensource.altera.com Cc: linux-arm-kernel@lists.infradead.org Cc: linux-edac <linux-edac@vger.kernel.org> Link: http://lkml.kernel.org/r/1468512408-5156-6-git-send-email-tthayer@opensource.altera.com [ Reformat loop in altr_edac_a10_probe() for better readability. ] Signed-off-by: Borislav Petkov <bp@suse.de>
2016-06-25EDAC, altera: Add Arria10 Ethernet EDAC supportThor Thayer1-0/+7
Add Altera Arria10 Ethernet FIFO memory EDAC support. Update to support a common compatibility string for all Ethernet FIFOs in the DT. Signed-off-by: Thor Thayer <tthayer@opensource.altera.com> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-edac <linux-edac@vger.kernel.org> Link: http://lkml.kernel.org/r/1466603939-7526-8-git-send-email-tthayer@opensource.altera.com Signed-off-by: Borislav Petkov <bp@suse.de>
2016-03-29EDAC, altera: Make L2C depend on L2x0 cache controllerThor Thayer1-3/+2
Make L2 cache depend instead of forcibly select the L2 cache support. Signed-off-by: Thor Thayer <tthayer@opensource.altera.com> Cc: devicetree@vger.kernel.org Cc: dinguyen@opensource.altera.com Cc: linux-arm-kernel@lists.infradead.org Cc: linux@arm.linux.org.uk Cc: linux-edac <linux-edac@vger.kernel.org> Link: http://lkml.kernel.org/r/1458576106-24505-2-git-send-email-tthayer@opensource.altera.com Signed-off-by: Borislav Petkov <bp@suse.de>
2016-02-11EDAC, altera: Add Altera L2 cache and OCRAM supportThor Thayer1-5/+21
Add L2 Cache and On-Chip RAM EDAC support for the Altera SoCs. The SDRAM controller is using the Memory Controller model. Each type of ECC is individually configurable. Signed-off-by: Thor Thayer <tthayer@opensource.altera.com> Cc: devicetree@vger.kernel.org Cc: dinguyen@opensource.altera.com Cc: galak@codeaurora.org Cc: grant.likely@linaro.org Cc: ijc+devicetree@hellion.org.uk Cc: linux-arm-kernel@lists.infradead.org Cc: linux@arm.linux.org.uk Cc: linux-doc@vger.kernel.org Cc: linux-edac <linux-edac@vger.kernel.org> Cc: mark.rutland@arm.com Cc: Mauro Carvalho Chehab <mchehab@osg.samsung.com> Cc: pawel.moll@arm.com Cc: robh+dt@kernel.org Link: http://lkml.kernel.org/r/1455132384-17108-1-git-send-email-tthayer@opensource.altera.com Signed-off-by: Borislav Petkov <bp@suse.de>
2015-08-13x86/ras: Move AMD MCE injector to arch/x86/ras/Borislav Petkov1-10/+0
This is an x86-specific module and would benefit from being closer to the arch code. Move it there. Update copyright while at it. Signed-off-by: Borislav Petkov <bp@suse.de> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Tony Luck <tony.luck@intel.com> Link: http://lkml.kernel.org/r/1439396985-12812-14-git-send-email-bp@alien8.de Signed-off-by: Ingo Molnar <mingo@kernel.org>
2015-05-31EDAC, mpc8xxx: Adapt for FSL SoCYork Sun1-2/+2
Remove mpc83xx and mpc85xx as dependency. Signed-off-by: York Sun <yorksun@freescale.com> Acked-by: Johannes Thumshirn <morbidrsa@gmail.com> Cc: Mingkai.hu@freescale.com Link: http://lkml.kernel.org/r/1431425022-44766-1-git-send-email-Wenbin.Song@freescale.com Signed-off-by: songwenbin <wenbin.song@freescale.com> Signed-off-by: Borislav Petkov <bp@suse.de>
2015-05-29EDAC: Add APM X-Gene SoC EDAC driverLoc Ho1-0/+7
Add support for the APM X-Gene SoC EDAC driver. Signed-off-by: Loc Ho <lho@apm.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Cc: devicetree@vger.kernel.org Cc: dougthompson@xmission.com Cc: ijc+devicetree@hellion.org.uk Cc: jcm@redhat.com Cc: linux-arm-kernel@lists.infradead.org Cc: linux-edac <linux-edac@vger.kernel.org> Cc: mark.rutland@arm.com Cc: mchehab@osg.samsung.com Cc: patches@apm.com Cc: robh+dt@kernel.org Link: http://lkml.kernel.org/r/1432337580-3750-5-git-send-email-lho@apm.com Signed-off-by: Borislav Petkov <bp@suse.de>
2015-05-28EDAC: Cleanup atomic_scrub messBorislav Petkov1-3/+4
So first of all, this atomic_scrub() function's naming is bad. It looks like an atomic_t helper. Change it to edac_atomic_scrub(). The bigger problem is that this function is arch-specific and every new arch which doesn't necessarily need that functionality still needs to define it, otherwise EDAC doesn't compile. So instead of doing that and including arch-specific headers, have each arch define an EDAC_ATOMIC_SCRUB symbol which can be used in edac_mc.c for ifdeffery. Much cleaner. And we already are doing this with another symbol - EDAC_SUPPORT. This is also much cleaner than having CONFIG_EDAC enumerate all the arches which need/have EDAC support and drivers. This way I can kill the useless edac.h header in tile too. Acked-by: Ralf Baechle <ralf@linux-mips.org> Acked-by: Michael Ellerman <mpe@ellerman.id.au> Acked-by: Chris Metcalf <cmetcalf@ezchip.com> Acked-by: Ingo Molnar <mingo@kernel.org> Acked-by: Russell King <rmk+kernel@arm.linux.org.uk> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Doug Thompson <dougthompson@xmission.com> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-edac@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: linuxppc-dev@lists.ozlabs.org Cc: "Maciej W. Rozycki" <macro@codesourcery.com> Cc: Markos Chandras <markos.chandras@imgtec.com> Cc: Mauro Carvalho Chehab <mchehab@osg.samsung.com> Cc: Paul Mackerras <paulus@samba.org> Cc: "Steven J. Hill" <Steven.Hill@imgtec.com> Cc: x86@kernel.org Signed-off-by: Borislav Petkov <bp@suse.de>
2015-05-03EDAC, altera: Do not build it as a moduleThor Thayer1-2/+2
The SDRAM EDAC requires SDRAM configuration/initialization before SDRAM is accessed (in the preloader) and therefore before Linux is loaded. Having a module compile is not desired so force to be built into kernel. Signed-off-by: Thor Thayer <tthayer@opensource.altera.com> Cc: mchehab@osg.samsung.com Cc: Takashi Iwai <tiwai@suse.de> Link: http://lkml.kernel.org/r/1429308974-26380-3-git-send-email-tthayer@opensource.altera.com Signed-off-by: Borislav Petkov <bp@suse.de>
2015-01-07EDAC, synps: Add EDAC support for zynq ddr ecc controllerPunnaiah Choudary Kalluri1-0/+7
Add EDAC support for ecc errors reporting on the synopsys ddr controller. The ddr ecc controller corrects single bit errors and detects double bit errors. Selected important-ish notes from the changelog: - I have not taken care of spliting synps_edac_geterror_info function as it adds additional indentation levels and moreover the existing changes were made as part of the v2 review comments - Removed dt binding info as already there is a binding info available under memorycontroller. so, updated ecc info there. - Shortened the prefix "sysnopsys" to "synps" Signed-off-by: Punnaiah Choudary Kalluri <punnaia@xilinx.com> Link: http://lkml.kernel.org/r/a728a8d4678f4dbf9de189a480297c3d@BY2FFO11FD034.protection.gbl [ Boris: massage commit message. ] Signed-off-by: Borislav Petkov <bp@suse.de>
2014-11-25EDAC, mce_amd_inj: Convert mce_amd_inj module to debugfsBorislav Petkov1-5/+5
This module's interface belongs in debugfs, not in sysfs. Signed-off-by: Borislav Petkov <bp@suse.de>
2014-11-05amd64_edac: Build module on x86-32Tomasz Pala1-3/+3
By popular demand, enable amd64_edac on 32-bit too. Boris: - update Kconfig text. - add a warning on load which states that 32-bit configurations are unsupported. Signed-off-by: Tomasz Pala <gotar@polanet.pl> Link: http://lkml.kernel.org/r/20141102102212.GA7034@polanet.pl Signed-off-by: Borislav Petkov <bp@suse.de>
2014-09-04edac: altera: Add Altera SDRAM EDAC supportThor Thayer1-0/+9
This patch adds support for the CycloneV and ArriaV SDRAM controllers. Correction and reporting of SBEs, Panic on DBEs. There was a discussion thread on whether this driver should be an mfd driver or just make use of syscon, which is already a mfd. Ultimately, the decision to use a simple syscon interface was reached.[1] [1] https://lkml.org/lkml/2014/7/30/514 [dinguyen] Fixed Kconfig to have EDAC_ALTERA_MC as a tristate to prevent a build failure for allmodconfig. Signed-off-by: Thor Thayer <tthayer@opensource.altera.com> Acked-by: Borislav Petkov <bp@suse.de> [dinguyen] cleaned up commit message Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2014-08-15Merge branch 'linux_next' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-edacLinus Torvalds1-2/+2
Pull EDAC updates from Mauro Carvalho Chehab. * 'linux_next' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-edac: sb_edac: add support for Haswell based systems sb_edac: Fix mix tab/spaces alignments edac: add DDR4 and RDDR4 sb_edac: remove bogus assumption on mc ordering sb_edac: make minimal use of channel_mask sb_edac: fix socket detection on Ivy Bridge controllers sb_edac: update Kconfig description sb_edac: search devices using product id sb_edac: make RIR limit retrieval per model sb_edac: make node id retrieval per model sb_edac: make memory type detection per memory controller
2014-08-04Merge branch 'x86-ras-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tipLinus Torvalds1-0/+1
Pull RAS updates from Ingo Molnar: "The main changes in this cycle are: - RAS tracing/events infrastructure, by Gong Chen. - Various generalizations of the APEI code to make it available to non-x86 architectures, by Tomasz Nowicki" * 'x86-ras-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86/ras: Fix build warnings in <linux/aer.h> acpi, apei, ghes: Factor out ioremap virtual memory for IRQ and NMI context. acpi, apei, ghes: Make NMI error notification to be GHES architecture extension. apei, mce: Factor out APEI architecture specific MCE calls. RAS, extlog: Adjust init flow trace, eMCA: Add a knob to adjust where to save event log trace, RAS: Add eMCA trace event interface RAS, debugfs: Add debugfs interface for RAS subsystem CPER: Adjust code flow of some functions x86, MCE: Robustify mcheck_init_device trace, AER: Move trace into unified interface trace, RAS: Add basic RAS trace event x86, MCE: Kill CPU_POST_DEAD
2014-07-04ie31200_edac: Introduce the driverJason Baron1-0/+7
Add a driver for the E3-1200 series of Intel DRAM controllers, based on the following E3-1200 specs: http://www.intel.com/content/www/us/en/processors/xeon/xeon-e3-1200-family-vol-2-datasheet.html http://www.intel.com/content/www/us/en/processors/xeon/xeon-e3-1200v3-vol-2-datasheet.html I've tested this on bad memory hardware, and observed correlating bad reads and uncorrected memory errors as reported by the driver. Tested against: CPU E3-1270 v3 @ 3.50GHz : 8086:0c08 (haswell) CPU E3-1270 V2 @ 3.50GHz : 8086:0158 (ivy bridge) CPU E31270 @ 3.40GHz : 8086:0108 (sandy bridge) Signed-off-by: Jason Baron <jbaron@akamai.com> Link: http://lkml.kernel.org/r/95c83e80dd40b5377e8bb206285c5d95ac623872.1403818526.git.jbaron@akamai.com [ Boris: realign defines ] Signed-off-by: Borislav Petkov <bp@suse.de>
2014-06-26sb_edac: add support for Haswell based systemsAristeu Rozanski1-2/+2
Haswell memory controllers are very similar to Ivy Bridge and Sandy Bridge ones. This patch adds support to Haswell based systems. [m.chehab@samsung.com: Fix CodingStyle issues] Cc: Tony Luck <tony.luck@intel.com> Signed-off-by: Aristeu Rozanski <aris@redhat.com> Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
2014-06-26sb_edac: update Kconfig descriptionAristeu Rozanski1-2/+2
Kconfig wasn't updated when Ivy Bridge support was added. Cc: Tony Luck <tony.luck@intel.com> Signed-off-by: Aristeu Rozanski <aris@redhat.com> Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
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