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path: root/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21 (follow)
AgeCommit message (Expand)AuthorFilesLines
2022-08-10drm/amd/display: remove header from source fileMagali Lemes2-2/+2
2022-07-25drm/amd/display: move FPU code on dcn21 clk_mgrMelissa Wen2-230/+11
2022-07-12drm/amd/display: Removing assert statements for LinuxSaaem Rizvi1-2/+6
2022-06-21drm/amd/display: Add SMU logging codeSaaem Rizvi1-0/+12
2022-05-26drm/amd/display: Fic incorrect pipe being used for clk updateBhawanpreet Lakha1-1/+1
2022-04-12drm/amd/display: Insert pulling smu busy status before sending another requestOliver Logush1-0/+3
2022-04-12drm/amd/display: Power down hardware if timer not triggerPaul Hsieh1-3/+14
2022-01-14drm/amd/display: Revert W/A for hard hangs on DCN20/DCN21Mario Limonciello1-10/+1
2021-12-13drm/amd/display: fix function scopesIsabella Basso2-19/+8
2021-12-13drm/amd: add some extra checks that is_dig_enabled is definedMario Limonciello1-1/+2
2021-12-13drm/amd: append missing includesIsabella Basso1-0/+2
2021-09-28drm/amd/display: Replace referral of dal with dcQingqing Zhuo1-1/+1
2021-09-14drm/amd/display: Apply w/a for hard hang on HPDQingqing Zhuo1-1/+11
2021-09-14drm/amd/display: Revert "dc: w/a for hard hang on HPD on native DP"Qingqing Zhuo1-3/+1
2021-08-05drm/amd/display: workaround for hard hang on HPD on native DPQingqing Zhuo1-1/+3
2021-07-08drm/amd/display: Round KHz up when calculating clock requestsAric Cyr1-8/+8
2021-06-08drm/amd/display: Revert "Fix clock table filling logic"Ilya Bakoulin1-51/+27
2021-05-19drm/amd/display: treat memory as a single-channel for asymmetric memory V3Hugo Hu1-2/+46
2021-05-10drm/amd/display: Handle potential dpp_inst mismatch with pipe_idxAnthony Wang1-3/+3
2021-05-10drm/amd/display: Fix clock table filling logicIlya Bakoulin1-27/+53
2021-05-10drm/amdgpu/dc: Revert commit "treat memory as a single-channel"Aric Cyr1-46/+2
2021-04-28drm/amd/display: Revert wait vblank on update dpp clockLewis Huang1-9/+1
2021-04-20drm/amd/display: treat memory as a single-channel for asymmetric memory v2Hugo Hu1-2/+46
2021-04-15drm/amd/display: wait vblank when stream enabled and update dpp clockLewis Huang1-1/+9
2021-04-09drm/amd/display: Populate socclk entries for dcn2.1Roman Li1-0/+13
2020-12-23drm/amd/display: always program DPPDTO unless not safe to lowerJake Wang1-6/+5
2020-12-23drm/amd/display: updated wm table for RenoirJake Wang1-8/+8
2020-12-23drm/amd/display: Update RN/VGH active display count workaroundMichael Strauss1-8/+1
2020-12-23drm/amd/display: change SMU repsonse timeout to 2s.Yongqiang Sun1-1/+1
2020-12-15drm/amd/display: updated wm table for RenoirJake Wang1-6/+6
2020-12-08drm/amd/display: Add wm table for RenoirSung Lee1-4/+89
2020-12-01drm/amd/display: Init clock value by current vbios CLKsBrandon Syu1-2/+11
2020-11-16drm/amd/display: Increase sr enter/exit in rn ddr4 watermark tableWyatt Wood1-2/+2
2020-11-16drm/amd/display: set dpp dto as per requested clk for lower case.Yongqiang Sun1-5/+23
2020-11-16drm/amd/display: Handle Unknown Result for SMU Periodic Retraining on DCN2.1Sung Lee1-1/+2
2020-11-16drm/amd/display: Program dpp dto based on actual dpp clkYongqiang Sun1-3/+26
2020-11-10drm/amd/display: check actual clock value.Yongqiang Sun2-3/+14
2020-11-10drm/amd/display: update dpp dto phase and modulo.Yongqiang Sun1-4/+2
2020-10-26drm/amd/display: DCN2.1 Disable 48MHz Powerdown Debug OptionSung Lee1-1/+1
2020-09-29drm/amd/display: remove duplicate call to rn_vbios_smu_get_smu_version()Dirk Gouders1-1/+0
2020-09-15drm/amd/display: Check clock table returnRodrigo Siqueira1-2/+5
2020-08-26drm/amd/display: Send DISPLAY_OFF after power down on bootSung Lee1-0/+10
2020-07-14drm/amd/display: reduce sr_xxx_time by 3 us when ppt disableChiawen Huang3-3/+54
2020-07-08drm/amd/display: Request PHYCLK adjustment on PHY enable/disableJoshua Aberback1-6/+21
2020-07-02drm/amd/display: Handle SMU msg responseYongqiang Sun1-2/+38
2020-07-01drm/amd/display: Red screen observed on startupPeikang Zhang1-1/+2
2020-04-07drm/amd/display: Check for null fclk voltage when parsing clock tableMichael Strauss1-1/+1
2020-03-05drm/amd/display: Remove DISPCLK Limit Floor for Certain SMU VersionsSung Lee1-0/+8
2020-02-25drm/amd/display: make some rn_clk_mgr structs and funcs staticAnthony Koo1-4/+4
2020-02-06drm/amd/display: Limit minimum DPPCLK to 100MHz.Yongqiang Sun1-0/+6
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