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path: root/drivers/gpu/drm/amd/display/dc/dce100/dce100_hw_sequencer.c (follow)
AgeCommit message (Expand)AuthorFilesLines
2019-12-05drm/amd/display: add separate of private hwss functionsAnthony Koo1-2/+1
2019-05-31drm/amd/display: make clk mgr soc specificEric Yang1-4/+5
2018-11-30drm/amd/display: Allow clock lower on dce100David Francis1-1/+13
2018-11-05drm/amd/display: rename dccg to clk_mgrDmytro Laktyushkin1-2/+2
2018-11-05drm/amd/display: remove safe_to_lower flag from dc, use 2 functions insteadDmytro Laktyushkin1-10/+5
2018-11-05drm/amd/display: move pplib/smu notification to dccg blockDmytro Laktyushkin1-56/+4
2018-07-24drm/amd/display: Remove unnecessary warningMikita Lipski1-4/+0
2018-07-05drm/amd/display: rename display clock block to dccgDmytro Laktyushkin1-2/+2
2018-07-05drm/amd/display: redesign dce/dcn clock voltage update requestDmytro Laktyushkin1-6/+43
2018-02-19drm/amd/display: Re-use DCE100 display_power_gating for DCE80Harry Wentland1-1/+1
2017-12-06drm/amd/display: send display_count msg so SMU can enter S0i2Hersen Wu1-0/+2
2017-09-29amdgpu/dc: another round of dce/dcn construct cleanups.Dave Airlie1-3/+1
2017-09-26drm/amd/display: Rename dc validate_context and current_contextJerry Zuo1-4/+4
2017-09-26drm/amd/display: Flattening core_dc to dcBhawanpreet Lakha1-5/+4
2017-09-26drm/amd/display: do not report min_memory_clock_khz to pplib for dce8 & 10Dmytro Laktyushkin1-2/+2
2017-09-26drm/amd/display: refactor bw related variable structure in val_ctxDmytro Laktyushkin1-5/+4
2017-09-26drm/amd/display: decouple resource_pool from resource_contextTony Cheng1-2/+2
2017-09-26drm/amd/display: update dce8 & 10 bw programmingDmytro Laktyushkin1-14/+14
2017-09-26drm/amd/display: Fill in vrefresh and min_vblank_time for dce8/dce10Jordan Lazare1-0/+21
2017-09-26drm/amd/display: bandwidth update fixDmytro Laktyushkin1-10/+5
2017-09-26drm/amd/dc: Add dc display driver (v2)Harry Wentland1-0/+140