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path: root/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_optc.c (follow)
AgeCommit message (Expand)AuthorFilesLines
2021-12-13drm/amd/display: fix function scopesIsabella Basso1-54/+3
2021-11-22drm/amd/display: fixed the DSC power off sequence during Driver PnPYi-Ling Chen1-0/+14
2021-09-28drm/amd/display: Add PPS immediate update flag for DCN2Ilya1-0/+5
2021-08-05drm/amd/display: Fix Dynamic bpp issue with 8K30 with Navi 1XBing Guo1-1/+1
2021-06-08drm/amd/display: Return last used DRR VTOTAL from DCJayendran Ramani1-1/+9
2021-04-09drm/amd/display: Move vupdate keepout programming from DCN20 to DCN10Leo Li1-16/+0
2021-03-02drm/amd/display: Fix 64 bit divisions on 32 bit platforms by using div64 APIVladimir Stempen1-6/+7
2021-02-22drm/amd/display: Synchronize displays with different timingsVladimir Stempen1-0/+123
2020-10-09drm/amd/display: Fix OPTC_DATA_FORMAT programmingDmytro Laktyushkin1-8/+0
2020-04-22drm/amd/display: add optc get crc support for timings with ODM/DSCWenjing Liu1-1/+13
2019-12-18drm/amd/display: Fix manual trigger source for DCN2Aric Cyr1-7/+1
2019-12-18drm/amd/display: Map ODM memory correctly when doing ODM combineNikola Cornij1-4/+12
2019-12-05drm/amd/display: Extend DMCUB offload testing into dcn20/21Nicholas Kazlauskas1-0/+5
2019-11-19drm/amd/display: cleanup of function pointer tablesAnthony Koo1-6/+6
2019-11-13drm/amd/display: Drop CONFIG_DRM_AMD_DC_DCN2_0 and DSC_SUPPORTEDBhawanpreet Lakha1-4/+0
2019-10-10drm/amd/display: add more checks to validate seamless boot timingMartin Leung1-1/+1
2019-10-03drm/amd/display: Set number of pipes to 1 if the second pipe was disabledNikola Cornij1-0/+4
2019-08-22Revert "drm/amd/display: add global master update lock for DCN2"David Francis1-62/+1
2019-08-22Revert "drm/amd/display: skip dsc config for navi10 bring up"David Francis1-9/+0
2019-08-15drm/amd/display: update optc odm interface for more than 2 oppsDmytro Laktyushkin1-9/+11
2019-08-15drm/amd/display: enabling seamless boot sequence for dcn2Martin Leung1-1/+2
2019-07-18drm/amd/display: Change min_h_sync_width from 8 to 4Fatemeh Darbehani1-1/+1
2019-06-22drm/amd/display: Do a reg update instead of set when writing ODM color formatNikola Cornij1-1/+1
2019-06-22drm/amd/display: Fix ODM combine data formatIlya Bakoulin1-1/+10
2019-06-22drm/amd/display: add global master update lock for DCN2Wenjing Liu1-1/+62
2019-06-22drm/amd/display: isolate global double buffer lock programmingWenjing Liu1-41/+19
2019-06-22drm/amd/display: skip dsc config for navi10 bring uphersen wu1-0/+9
2019-06-22drm/amd/display: Ensure DRR triggers in BPEryk Brol1-0/+31
2019-06-22drm/amd/display: Program VTG params after programming Global Sync for DCN2Joshua Aberback1-0/+1
2019-06-22drm/amd/display: Add DSC support for Navi (v2)Harry Wentland1-0/+38
2019-06-21drm/amd/display: Add DCN2 OPTCHarry Wentland1-0/+415
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