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path: root/drivers/gpu/drm/amd/include/asic_reg/nbio
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2022-08-25drm/amdgpu: add TX_POWER_CTRL_1 macro definitions for NBIO IP v7.7.0Tim Huang2-0/+15
Add the BIF0_PCIE_TX_POWER_CTRL_1 register offset and mask macro definitions for AMD_CG_SUPPORT_BIF_LS. Signed-off-by: Tim Huang <tim.huang@amd.com> Reviewed-by: Yifan Zhang <yifan1.zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-06-08drm/amdgpu: enable ASPM support for PCIE 7.4.0/7.6.0Evan Quan2-0/+3
Enable ASPM support for PCIE 7.4.0 and 7.6.0. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-06-03drm/amdgpu: add CSDMA reg offsets for NBIO v7.7.0Xiaojian Du2-0/+14
This patch will add CSDMA reg offsets for NBIO v7.7.0 Signed-off-by: Xiaojian Du <Xiaojian.Du@amd.com> Acked-by: Roman Li <roman.li@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-06drm/amdgpu: add nbio v7_7_0 ip headersHuang Rui2-0/+184057
Add nbio v7.7.0 offset and shift mask ip header files. v2: squash in updates (Alex) Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Aaron Liu <aaron.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04drm/amdgpu: add nbio v4_3_0 ip headers v6Hawking Zhang2-0/+99428
Add nbio v4_3_0 register offset and shift masks header files (Hawking) Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-12-16drm/amdgpu: clean up some leftovers from bring upAlex Deucher2-14/+0
Some old registers leftover from pre-silicon. No longer relevant on real hardware. Remove. Reviewed-by: James Zhu <James.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-05drm/amdgpu: add vangogh asic header files (v2)Huang Rui2-0/+184368
This patch is to add vangogh asic header files. v2: squash in updates Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-04-01drm/amdgpu: cleanup all virtualization detection routineMonk Liu2-0/+4
we need to move virt detection much earlier because: 1) HW team confirms us that RCC_IOV_FUNC_IDENTIFIER will always be at DE5 (dw) mmio offset from vega10, this way there is no need to implement detect_hw_virt() routine in each nbio/chip file. for VI SRIOV chip (tonga & fiji), the BIF_IOV_FUNC_IDENTIFIER is at 0x1503 2) we need to acknowledged we are SRIOV VF before we do IP discovery because the IP discovery content will be updated by host everytime after it recieved a new coming "REQ_GPU_INIT_DATA" request from guest (there will be patches for this new handshake soon). Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Emily Deng <Emily.Deng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-09-16drm/amdgpu: add pcie bif ras related registersGuchun Chen2-0/+55
These registers will be accessed for querying ras errors. Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Signed-off-by: Guchun Chen <guchun.chen@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-09-13drm/amdgpu: update nbio v7_4 ip header filesHawking Zhang2-5/+5
Add mmBIF_INTR_CNTL and its shift mask. Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-02drm/amdgpu: Update NBIO headers to add TXCLK3/4Kent Russell2-0/+36
These are added for VG20, and are needed for PCIe bandwidth. Signed-off-by: Kent Russell <kent.russell@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-06-20drm/amdgpu: add NBIO 2.3 register headersHawking Zhang3-0/+153523
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-05-24drm/amdgpu: Add replay counter defines to NBIO headersKent Russell3-0/+9
Add the PCIE_RX_NUM_NACK and PCIE_RX_NUM_NACK_GENERATED values to the NBIO SMN headers in preparation for exposing the number of PCIe replays via sysfs Signed-off-by: Kent Russell <kent.russell@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-01-25drm/amdgpu: update NBIO v7.4 to support BACOJim Qu2-0/+5
Signed-off-by: Jim Qu <Jim.Qu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-01-14drm/amdgpu: update nbio v6.1 register/master to support BACOJim Qu2-0/+6
Signed-off-by: Jim Qu <Jim.Qu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-01-14drm/amdgpu: Add NBIO SMN headers v2Kent Russell3-0/+165
We need these offsets for PCIE perf counters, so include them as well as the the previously-used defines from the nbio_*.c files v2: Return NBIF definitions back to previous files Signed-off-by: Kent Russell <kent.russell@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27drm/amdgpu/include: Add nbio 7.4 header files (v4)Feifei Xu2-0/+53063
v2: Cleanups (Alex) v3: More updates (Alex) v4: more cleanups (Alex) Signed-off-by: Feifei Xu <Feifei.Xu@amd.com> Acked-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06drm/amd/include:cleanup raven1 nbio header files.Feifei Xu3-0/+138450
Cleanup asic_reg/raven1/NBIO folder. Signed-off-by: Feifei Xu <Feifei.Xu@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06drm/amd/include:cleanup vega10 nbio header files.Feifei Xu3-0/+159873
Cleanup asic_reg/vega10/NBIO folder. Signed-off-by: Feifei Xu <Feifei.Xu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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