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path: root/drivers/gpu/drm/amd/powerplay
AgeCommit message (Expand)AuthorFilesLines
2018-05-15drm/amd/powerplay: update ppatomctrl.c (v2)Eric Huang2-0/+41
2018-05-15drm/amd/powerplay: add smu75 header filesEric Huang2-0/+1646
2018-05-15drm/amdgpu: add VEGAM SMU firmware supportLeo Liu1-0/+1
2018-05-15drm/amd/pp: Add OVERDRIVE support on Vega10 (v2)Rex Zhu3-361/+390
2018-05-15drm/amdgpu/powerplay: actually return the power with the new queryAlex Deucher1-0/+1
2018-05-15drm/amd/pp: Print out voltage/clock range in sysfsRex Zhu1-6/+20
2018-05-15drm/amd/pp: Change voltage/clk range for OD feature on VIRex Zhu4-20/+73
2018-05-15drm/amd/pp: Refine the OD state checking code in smu7Rex Zhu1-6/+2
2018-05-15drm/amd/pp: Use dynamic gfx_clk rather than hardcoded valuesRex Zhu2-20/+29
2018-05-15drm/amd/pp: Change pstate_clk frequency unit to 10KHz on RvRex Zhu1-2/+2
2018-05-15drm/amd/powerplay: use the flag to decide whether send gfxoff smc messageHuang Rui1-1/+5
2018-05-15drm/amd/powerplay: add control gfxoff enabling in late initHuang Rui1-0/+9
2018-05-15drm/amdgpu: clear gfxoff feature mask if the asic is not ravenHuang Rui1-1/+5
2018-05-15drm/amdgpu: use pp_feature member to store the maskHuang Rui1-1/+1
2018-05-15drm/amd/powerplay: enable/disable gfxoff through smuHuang Rui1-0/+9
2018-05-15drm/amd/powerplay: add gfx off control functionHuang Rui2-1/+36
2018-05-15drm/amdgpu: move PP_FEATURE_MASK to amd_shared headerHuang Rui1-19/+0
2018-05-15drm/amd/powerplay: send CGPG smc message if PG is enabled for ravenHuang Rui2-1/+8
2018-05-15drm/amd/powerplay: add registry key to disable ACGKenneth Feng2-0/+6
2018-05-15drm/amd/powerplay: header file interface to SMU updateKenneth Feng1-1/+3
2018-05-15drm/amd/pp: Fix NULL point check error in smu_set_watermarks_for_clocks_rangesRex Zhu1-1/+1
2018-05-15drm/amd/pp: Fix bug voltage can't be OD separately on VIRex Zhu1-6/+10
2018-05-15drm/amd/pp: Remove dead interfaceRex Zhu1-30/+0
2018-05-15drm/amdgpu: Reserved vram for smu to save debug info.Rex Zhu1-0/+35
2018-05-15drm/amd/pp: Adding a function to store cc6 data in SMU10Mikita Lipski1-0/+10
2018-05-15drm/amd/pp: Adding set_watermarks_for_clocks_ranges for SMU10Mikita Lipski2-0/+14
2018-05-15drm/amd/pp: Move common code to smu_helper.cRex Zhu4-70/+109
2018-05-15drm/amd/pp: Clear smu response register before send smu messageRex Zhu2-3/+2
2018-05-15drm/amd/pp: Remove struct pp_gpu_powerRex Zhu3-33/+20
2018-05-15drm/amd/pp: Refine get_gpu_power for VIRex Zhu2-24/+31
2018-05-15Revert "drm/amd/powerply: fix power reading on Fiji"Rex Zhu1-2/+1
2018-05-15drm/amdgpu/powerplay: rename smu7_upload_mc_firmwareAlex Deucher1-2/+2
2018-05-15drm/amdgpu/powerplay: fix smu7_get_memory_type for fijiAlex Deucher1-6/+2
2018-05-15drm/amd/pp: Remove useless smu7 running state checkRex Zhu1-8/+0
2018-05-15drm/amd/pp: Remove dead function in smu7_smumgr.cRex Zhu2-11/+0
2018-05-15drm/amd/powerplay: initialzie the dpm intial enabled stateKenneth Feng1-0/+10
2018-05-15drm/amd/powerplay: Get more than 8 level gfxclk statesKenneth Feng1-1/+1
2018-05-15amd/powerplay: implement the vega12_force_clock_level interfaceKenneth Feng1-1/+41
2018-05-15drm/amd/pp: Remove unnecessary forward declarationRex Zhu1-43/+41
2018-05-15drm/amd/pp: Move same macro definitions to hwmgr.hRex Zhu10-27/+2
2018-05-15drm/amd/pp: fix the wrong readout engine clock in deep sleepEvan Quan2-9/+5
2018-05-15drm/amd/pp: use soc15 common macros instead of vega10 specificEvan Quan10-280/+133
2018-05-15drm/amd/pp: Refine pp_atomfwctrl_get_vbios_bootup_valuesRex Zhu3-8/+9
2018-04-11drm/amdgpu: remove duplicate cg/pg wrapper functionsRex Zhu4-28/+24
2018-04-11drm/amd/pp: Not call cgs interface to get display infoRex Zhu13-136/+61
2018-04-11drm/amd/pp: Use atombios api directly in powerplay (v2)Rex Zhu12-123/+149
2018-04-11drm/amd/pp: Use gfx rlc funcs directly in powerplayRex Zhu2-38/+46
2018-04-11drm/amd/pp: Fix spelling mistake: "suppported" -> "supported"Colin Ian King1-1/+1
2018-04-11drm/amdgpu: Use dpm_enabled as dpm state flagRex Zhu1-1/+2
2018-04-11drm/amd/pp: Use release_firmware directly in powerplayRex Zhu3-3/+5
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