aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/gpu/drm/amd/powerplay
AgeCommit message (Expand)AuthorFilesLines
2018-02-26drm/amd/pp: Fix error handling when smu return failed on Vega10.Rex Zhu1-12/+14
2018-02-19drm/amdgpu/powerplay/smu7: drop refresh rate checks for mclk switchingAlex Deucher1-2/+1
2018-02-19drm/amd/powerplay/smu7: allow mclk switching with no displaysAlex Deucher1-4/+7
2018-02-19drm/amd/powerplay/vega10: allow mclk switching with no displaysAlex Deucher1-4/+7
2018-02-19drm/amd/powerplay: use PP_CAP macro for disable_mclk_switching_for_frame_lockAlex Deucher1-4/+4
2018-02-19drm/amd/powerplay: remove unused headersCorentin Labbe2-479/+0
2018-02-19drm/amd/pp: Restore power profile mode in auto dpm level on Vega10Rex Zhu2-3/+8
2018-02-19drm/amd/pp: Expose set/get_power_limit for DGPURex Zhu6-6/+75
2018-02-19drm/amd/powerplay: Remove extra pair of parenthesesMatthias Kaehlcke1-1/+1
2018-02-19drm/amd/powerplay: Fix enum mismatchMatthias Kaehlcke2-5/+5
2018-02-19drm/amd/powerplay: add mmhub powergating by smu in powerplayEric Huang2-0/+23
2018-02-19drm/amd/powerplay: implement set_mmhub_powergating_by_smu for RavenEric Huang2-1/+8
2018-02-19drm/amd/powerplay: delete some dead codeDan Carpenter2-4/+0
2018-02-19drm/amd/powerplay: Zero out power data in AMDGPU_PP_SENSOR_GPU_POWER readoutTom St Denis1-0/+2
2018-02-19drm/amd/pp: Fix sysfs pp_dpm_pcie bug on CI/VIRex Zhu1-7/+10
2018-02-19drm/amd/pp: Enable pp_set_power_profile_mode under manual modeRex Zhu1-2/+6
2018-02-19drm/amd/pp: Refine pp_dpm_force_clock_level functionsRex Zhu4-14/+4
2018-02-19drm/amd/pp: Delete debug info when set power_profile_modeRex Zhu1-2/+0
2018-02-19drm: amd: Fix trailing semicolonsLuis de Bethencourt1-1/+1
2018-02-19drm/amdgpu/pp: remove the get_temperature APIAlex Deucher5-28/+0
2018-02-19drm/amd/pp: Delete unnecessary function argumentRex Zhu5-18/+8
2018-02-19drm/amd/pp: Add struct profile_mode_setting for smu7Rex Zhu7-39/+56
2018-02-19drm/amd/pp: Delete dead code in powerplayRex Zhu12-45/+15
2018-02-19drm/amd/pp: Change activity_target for performance optimization on PolarisRex Zhu5-7/+4
2018-02-19drm/amd/pp: Add update_avfs call when set_power_stateRex Zhu1-28/+57
2018-02-19drm/amd/pp: Update smu7 dpm table with OD clock/voltageRex Zhu4-107/+71
2018-02-19drm/amd/pp: Implement edit_dpm_table on smu7Rex Zhu1-1/+164
2018-02-19drm/amd/pp: Disable OD feature on APU/IcelandRex Zhu1-0/+4
2018-02-19drm/amd/pp: Disable OD feature if VBIOS limitsRex Zhu3-14/+13
2018-02-19drm/amd/pp: Add edit/commit/show OD clock/voltage support in sysfsRex Zhu1-0/+19
2018-02-19drm/amd/pp: Add hwmgr interface for edit dpm tableRex Zhu1-0/+3
2018-02-19drm/amdgpu/powerplay/vega10: fix compute profile nameAlex Deucher1-1/+1
2018-02-19drm/amd/pp: include new ip and ip offset headersHawking Zhang1-1/+2
2018-02-19drm/amd/pp: Add OD driver clock/voltage display on smu7Rex Zhu1-0/+21
2018-02-19drm/amd/pp: Add and initialize OD_dpm_table for CI/VI.Rex Zhu2-0/+89
2018-02-19drm/amd/pp: Add a new pp feature mask bit for OD featureRex Zhu4-9/+9
2018-02-19drm/amd/pp: Move DPMTABLE_* definitions to common header fileRex Zhu3-11/+11
2018-02-19drm/amd/pp: Refine code abbreviate variable nameRex Zhu2-6/+6
2018-02-19drm/amd/pp: Add stable Pstate clk display support in debugfsRex Zhu1-9/+14
2018-02-19drm/amd/pp: Store stable Pstate clocksRex Zhu5-2/+24
2018-02-19drm/amd/pp: Add custom power profile mode support on Vega10Rex Zhu4-0/+123
2018-02-19drm/amd/pp: Fix SMIO implementation on CIRex Zhu1-11/+20
2018-02-19drm/amd/pp: Implement voltage regulator config on CIRex Zhu3-1/+58
2018-02-19drm/amd/pp: Add querying current gfx voltage for Vega10Rex Zhu2-1/+15
2018-02-19drm/amd/pp: Add querying current gfx voltage for CI/VIRex Zhu5-5/+15
2018-02-19drm/amd/pp: Add memory clock info display on Cz/StRex Zhu1-0/+13
2018-02-19drm/amd/pp: Refine code shorten variable nameRex Zhu2-17/+9
2018-02-19drm/amd/pp: Add a helper to convert VID to voltage valueRex Zhu2-0/+6
2018-02-19drm/amd/powerplay: use ffs/fls instead of implementing our ownEvan Quan1-23/+4
2018-02-19drm/amd/powerplay: export the thermal ranges of Carrizo (V2)Evan Quan1-0/+15
Copyright © 1996 – 2026 Jason A. Donenfeld. All Rights Reverse Engineered.