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path: root/drivers/gpu/drm/i915/display/intel_bw.c (follow)
AgeCommit message (Expand)AuthorFilesLines
2022-09-12drm/i915/mtl: Obtain SAGV values from MMIO instead of GT pcode mailboxRadhakrishna Sripada1-5/+37
2022-09-09drm/i915: Extract skl_watermark.cVille Syrjälä1-1/+3
2022-08-31drm/i915: move and group max_bw and bw_obj under display.bwJani Nikula1-21/+21
2022-08-29drm/i915: move and group sagv under display.sagvJani Nikula1-5/+5
2022-08-25drm/i915/mtl: Update memory bandwidth parametersRadhakrishna Sripada1-3/+37
2022-08-25drm/i915: fix null pointer dereferenceŁukasz Bartosik1-7/+9
2022-05-20drm/i915/pcode: Extend pcode functions for multiple gt'sAshutosh Dixit1-3/+3
2022-03-31drm/i915: Handle the DG2 max bw properlyVinod Govindapillai1-10/+15
2022-03-30drm/i915: Move intel_vtd_active and run_as_guest to i915_utilsTvrtko Ursulin1-1/+2
2022-03-21drm/i915: Add "maximum pipe read bandwidth" checksVille Syrjälä1-5/+31
2022-03-21drm/i915: Fix DBUF bandwidth vs. cdclk handlingVille Syrjälä1-46/+111
2022-03-21drm/i915: Properly write lock bw_state when it changesVille Syrjälä1-1/+23
2022-03-21drm/i915: Round up when calculating display bandwidth requirementsVille Syrjälä1-2/+2
2022-03-21drm/i915: Nuke intel_bw_calc_min_cdclk()Ville Syrjälä1-45/+4
2022-03-21drm/i915: Split plane data_rate into data_rate+data_rate_yVille Syrjälä1-18/+18
2022-03-21drm/i915: Tweak plane ddb allocation trackingVille Syrjälä1-3/+3
2022-03-18drm/i915: Rename QGV request/response bitsVille Syrjälä1-4/+5
2022-03-18drm/i915: Unconfuses QGV vs. PSF point masksVille Syrjälä1-18/+17
2022-03-18drm/i915: Fix PSF GV point mask when SAGV is not possibleVille Syrjälä1-1/+2
2022-02-23drm/i915: Extract intel_bw_check_data_rate()Ville Syrjälä1-21/+34
2022-02-23drm/i915: Extract icl_qgv_points_mask()Ville Syrjälä1-13/+22
2022-02-18drm/i915: Fix bw atomic check when switching between SAGV vs. no SAGVVille Syrjälä1-2/+16
2022-02-16drm/i915: Move MCHBAR registers to their own headerMatt Roper1-0/+1
2022-02-11drm/i915: Extract skl_crtc_calc_dbuf_bw()Ville Syrjälä1-38/+44
2022-02-02drm/i915: Only include i915_reg.h from .c filesMatt Roper1-0/+1
2022-01-31Merge drm/drm-next into drm-intel-nextRodrigo Vivi1-1/+1
2022-01-13drm/i915/pcode: rename sandybridge_pcode_* to snb_pcode_*Jani Nikula1-8/+5
2021-12-10Merge tag 'drm-intel-gt-next-2021-12-09' of git://anongit.freedesktop.org/drm/drm-intel into drm-nextDave Airlie1-1/+1
2021-12-01drm/i915: Use per device iommu checkTvrtko Ursulin1-1/+1
2021-11-08drm/i915: Fix Memory BW formulae for ADL-PRadhakrishna Sripada1-1/+1
2021-11-04drm/i915: Update memory bandwidth formulaeRadhakrishna Sripada1-32/+179
2021-10-14drm/i915: split out intel_pcode.[ch] to separate fileJani Nikula1-1/+1
2021-09-15drm/i915: Update memory bandwidth parametersRadhakrishna Sripada1-3/+16
2021-07-27drm/i915: Implement PSF GV point supportStanislav Lisovskiy1-4/+109
2021-07-22drm/i915/dg2: DG2 has fixed memory bandwidthMatt Roper1-1/+23
2021-07-09drm/i915/dg1: Compute MEM Bandwidth using MCHBARClint Taylor1-1/+40
2021-05-25drm/i915: WA for zero memory channelJosé Roberto de Souza1-1/+1
2021-05-19drm/i915/adl_p: Update memory bandwidth parametersAnusha Srivatsa1-1/+1
2021-05-12drm/i915/xelpd: Required bandwidth increases when VT-d is activeMatt Roper1-0/+3
2021-04-21drm/i915: Polish for_each_dbuf_slice()Ville Syrjälä1-5/+6
2021-04-14drm/i915/display: rename display version macrosLucas De Marchi1-4/+4
2021-03-23drm/i915/display: Eliminate most usage of INTEL_GEN()Matt Roper1-5/+5
2021-02-05drm/i915/display: support ddr5 mem typesClint Taylor1-1/+11
2021-02-02Merge tag 'topic/adl-s-enabling-2021-02-01-1' of git://anongit.freedesktop.org/drm/drm-intel into drm-intel-nextJani Nikula1-1/+9
2021-02-01drm/i915/adl_s: Update memory bandwidth parametersTejas Upadhyay1-1/+9
2021-01-29drm/i915/gen11+: Only load DRAM information from pcodeJosé Roberto de Souza1-72/+8
2020-06-04drm/i915: Fix wrong CDCLK adjustment changesStanislav Lisovskiy1-19/+33
2020-05-22drm/i915: Fix includes and local vars orderStanislav Lisovskiy1-20/+24
2020-05-21drm/i915: Adjust CDCLK accordingly to our DBuf bw needsStanislav Lisovskiy1-2/+119
2020-05-20drm/i915/rkl: Update memory bandwidth parametersMatt Roper1-1/+9
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