aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/gpu/drm/i915/display/intel_display.c (follow)
AgeCommit message (Expand)AuthorFilesLines
2020-02-18drm/i915: Wean off drm_pci_alloc/drm_pci_freeChris Wilson1-1/+1
2020-02-17drm/i915/dsc: force full modeset whenever DSC is enabled at probeJani Nikula1-0/+18
2020-02-10drm/i915: Make a copy of the ggtt view for slave planeVille Syrjälä1-0/+1
2020-02-09drm/i915: Fix post-fastset modeset check for port syncVille Syrjälä1-26/+17
2020-01-13drm/i915: Pass intel_encoder to enc_to_*()Ville Syrjälä1-2/+2
2020-01-13drm/i915: Pass intel_connector to intel_attached_*()Ville Syrjälä1-4/+4
2020-01-09Merge drm/drm-next into drm-intel-next-queuedJani Nikula1-2/+2
2020-01-07drm/i915/display: Use external dependency loop for port syncJosé Roberto de Souza1-52/+17
2020-01-07drm/i915: fix an error code in intel_modeset_all_tiles()Dan Carpenter1-1/+1
2020-01-07drm/i915/tgl: Gen-12 display can decompress surfaces compressed by the media engineDhinakaran Pandiyan1-37/+139
2020-01-07drm/i915: Make sure plane dims are correct for UV CCS planesImre Deak1-2/+6
2020-01-07drm/i915: Add debug message for FB plane[0].offset!=0 errorImre Deak1-1/+4
2020-01-07drm/i915/tgl: Make sure a semiplanar UV plane is tile row size alignedImre Deak1-3/+33
2020-01-07drm/i915: Add support for non-power-of-2 FB plane alignmentImre Deak1-8/+16
2019-12-30drm/i915/dp: Make port sync mode assignments only if all tiles presentManasi Navare1-65/+117
2019-12-30drm/i915/dp: Make sure all tiled connectors get added to the state with full modesetManasi Navare1-0/+138
2019-12-28drm/i915: prefer 3-letter acronym for ivybridgeLucas De Marchi1-2/+2
2019-12-28drm/i915: prefer 3-letter acronym for ironlakeLucas De Marchi1-84/+84
2019-12-28drm/i915: prefer 3-letter acronym for icelakeLucas De Marchi1-6/+5
2019-12-28drm/i915: prefer 3-letter acronym for cannonlakeLucas De Marchi1-4/+3
2019-12-28drm/i915: prefer 3-letter acronym for skylakeLucas De Marchi1-15/+14
2019-12-28drm/i915: prefer 3-letter acronym for haswellLucas De Marchi1-29/+28
2019-12-28drm/i915: prefer 3-letter acronym for pineviewLucas De Marchi1-4/+4
2019-12-27drm/i915: Extend WaDisableDARBFClkGating to icl,ehl,tglMatt Roper1-2/+5
2019-12-27Merge tag 'drm-intel-next-2019-12-23' of git://anongit.freedesktop.org/drm/drm-intel into drm-nextDave Airlie1-1360/+1700
2019-12-24drm/i915/display: cleanup intel_bw_state on i915 module removalPankaj Bharadiya1-0/+2
2019-12-23drm/i915/display: Add comment to a function that probably can be removedJosé Roberto de Souza1-0/+4
2019-12-23drm/i915/mst: Force modeset on MST slaves when master needs a modesetJosé Roberto de Souza1-0/+36
2019-12-23drm/i915/display: Prepare for fastset external dependencies checkJosé Roberto de Souza1-3/+15
2019-12-23drm/i915/display: Always enables MST master pipe firstJosé Roberto de Souza1-25/+83
2019-12-23drm/i915/tgl: Select master transcoder for MST streamJosé Roberto de Souza1-2/+10
2019-12-23drm/i915/display: Share intel_connector_needs_modeset()José Roberto de Souza1-31/+14
2019-12-23drm/i915: Make sure CCS YUV semiplanar format checks workImre Deak1-6/+19
2019-12-23drm/i915: Make sure Y slave planes get all the required stateImre Deak1-1/+2
2019-12-23drm/i915: Skip rotated offset adjustment for unsupported modifiersDhinakaran Pandiyan1-41/+77
2019-12-23drm/i915/tgl: Make sure FBs have a correct CCS plane strideImre Deak1-0/+17
2019-12-23drm/i915/tgl: Gen-12 render decompressionDhinakaran Pandiyan1-35/+162
2019-12-23drm/i915: Add helpers to select correct ccs/aux planesImre Deak1-14/+57
2019-12-23drm/i915: Extract framebufer CCS offset checks into a functionDhinakaran Pandiyan1-30/+43
2019-12-23drm/i915: Move CCS stride alignment W/A inside intel_fb_stride_alignmentDhinakaran Pandiyan1-15/+16
2019-12-23drm/i915: Use intel_tile_height() instead of re-implementingDhinakaran Pandiyan1-1/+1
2019-12-20drm/i915: Introduce intel_crtc_state_alloc()Ville Syrjälä1-11/+19
2019-12-19drm/i915/fbc: Remove second redundant intel_fbc_pre_update() callVille Syrjälä1-3/+0
2019-12-18drm/i915: Move stuff from haswell_crtc_disable() into encoder .post_disable()Ville Syrjälä1-49/+8
2019-12-18drm/i915: Pass old crtc state to intel_crtc_vblank_off()Ville Syrjälä1-4/+6
2019-12-18drm/i915: Pass old crtc state to skylake_scaler_disable()Ville Syrjälä1-2/+3
2019-12-18drm/i915: Nuke .post_pll_disable() for DDI platformsVille Syrjälä1-2/+0
2019-12-18drm/i915: Call hsw_fdi_link_train() directly()Ville Syrjälä1-2/+0
2019-12-18drm/i915: Introduce intel_crtc_state_reset()Ville Syrjälä1-25/+22
2019-12-18drm/i915: Introduce intel_crtc_{alloc,free}()Ville Syrjälä1-38/+36
Copyright © 1996 – 2023 Jason A. Donenfeld. All Rights Reverse Engineered.