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path: root/drivers/gpu/drm/i915/display/intel_vbt_defs.h (follow)
AgeCommit message (Expand)AuthorFilesLines
2022-09-13drm/i915/bios: Add the "Disable compression for the Display Port/HDMI external display" bitVille Syrjälä1-1/+2
2022-09-13drm/i915/bios: Fix VBT ACPI DPMS bit polarityVille Syrjälä1-1/+1
2022-09-05drm/i915: Rename some VBT bitsVille Syrjälä1-2/+2
2022-09-05drm/i915: Define all possible VBT device handlesVille Syrjälä1-0/+9
2022-09-05drm/i915: Define more VBT driver features block bitsVille Syrjälä1-4/+10
2022-09-05drm/i915: Document the sets of bits in the driver features blockVille Syrjälä1-0/+7
2022-09-05drm/i915: Define VBT max HDMI FRL rate bitsVille Syrjälä1-2/+4
2022-09-05drm/i915: Add the VBT LTTPR transparent vs. non-transparent bitsVille Syrjälä1-1/+2
2022-09-05drm/i915: Define VBT eDP/DP max lane count bitsVille Syrjälä1-1/+1
2022-09-05drm/i915: Properly define the DP redriver VBT bitsVille Syrjälä1-5/+11
2022-09-05drm/i915: Add some more VBT version number commentsVille Syrjälä1-38/+38
2022-09-05drm/i915: Unify VBT version number commentsVille Syrjälä1-97/+111
2022-08-31drm/i915: move vbt to display.vbtJani Nikula1-4/+4
2022-06-20drm/i915/bios: calculate panel type as per child device index in VBTAnimesh Manna1-0/+4
2022-06-16drm/i915/bios: Introduce panel_bits() and panel_bool()Ville Syrjälä1-3/+0
2022-06-08drm/i915: Parse max link rate from the eDP BDB blockVille Syrjälä1-0/+1
2022-06-08drm/i915: Update eDP fast link training link rate parsingVille Syrjälä1-0/+1
2022-06-01drm/i915/bios: Define more BDB contentsVille Syrjälä1-7/+43
2022-06-01drm/i915/bios: Fix aggressiveness typosVille Syrjälä1-4/+4
2022-05-05drm/i915/bios: Document the mess around the LFP data tablesVille Syrjälä1-1/+6
2022-05-05drm/i915/bios: Get access to the tail end of the LFP data blockVille Syrjälä1-0/+17
2022-04-12drm/i915/bios: Validate the panel_name tableVille Syrjälä1-0/+5
2022-04-04drm/i915/bios: Extract struct lvds_lfp_data_ptr_tableVille Syrjälä1-6/+7
2022-03-03drm/i915: update new TMDS clock setting defined by VBTLee Shawn C1-0/+3
2022-02-18drm/i915/display/tgl+: Implement new PLL programming stepJosé Roberto de Souza1-0/+8
2022-01-20drm/i915/bios: Nuke DEVICE_TYPE_DP_DUAL_MODE_BITSVille Syrjälä1-11/+0
2022-01-20drm/i915/bios: Throw out the !has_ddi_port_info() codepathsVille Syrjälä1-15/+0
2021-12-03drm/i915/adl_p: Add ddc pin mappingTejas Upadhyay1-1/+6
2021-09-30drm/i915/bdb: Fix version checkLukasz Majczak1-0/+5
2021-07-30drm/i915: replace random CNL commentsLucas De Marchi1-1/+1
2021-02-20drm/i915/vbt: update DP max link rate tableLee Shawn C1-6/+17
2021-01-26drm/i915/adl_s: Add adl-s ddc pin mappingAditya Swarup1-0/+4
2021-01-05drm/i915/rkl: new rkl ddc map for different PCHLee Shawn C1-0/+2
2020-10-09drm/i915/vbt: Add VRR VBT toggleJosé Roberto de Souza1-0/+1
2020-10-09drm/i915/vbt: Fix backlight parsing for VBT 234+José Roberto de Souza1-2/+10
2020-09-15drm/i915: Add VBT AUX CH H and IVille Syrjälä1-0/+2
2020-09-15drm/i915: Add VBT DVO ports H and IVille Syrjälä1-2/+6
2020-07-09drm/i915/bios: Parse HOBL parameterJosé Roberto de Souza1-0/+1
2020-05-09drm/i915: Replace zero-length array with flexible-arrayGustavo A. R. Silva1-2/+2
2020-01-14drm/i915/vbt: Rename BDB_LVDS_POWER to BDB_LFP_POWERJosé Roberto de Souza1-1/+1
2019-12-11drm/i915/bios: parse compression parameters blockJani Nikula1-1/+1
2019-12-02drm/i915/vbt: Parse power conservation features blockJosé Roberto de Souza1-0/+29
2019-11-18drm/i915/vbt: Handle generic DTD blockMatt Roper1-0/+31
2019-10-28drm/i915/bios: add compression parameter block definitionJani Nikula1-0/+52
2019-10-16drm/i915/tgl: Enable DDI/Port GKhaled Almahallawy1-0/+3
2019-08-19drm/i915/gen11: Allow usage of all GPIO pinsMatt Roper1-3/+0
2019-07-18drm/i915/vbt: Fix VBT parsing for the PSR sectionDhinakaran Pandiyan1-3/+3
2019-07-11drm/i915/tgl: Add vbt value mapping for DDC Bus pinMahesh Kumar1-0/+3
2019-06-17drm/i915/ehl: Introduce Mule Creek Canyon PCHMatt Roper1-0/+3
2019-06-17drm/i915: move modesetting core code under display/Jani Nikula1-0/+808
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