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path: root/drivers/gpu/drm/i915/gt/intel_engine.h (follow)
AgeCommit message (Expand)AuthorFilesLines
2021-10-15drm/i915/guc: Connect UAPI to GuC multi-lrc interfaceMatthew Brost1-1/+11
2021-10-12drm/i915/gt: add asm/cacheflush.h for use of clflush()Lucas De Marchi1-0/+1
2021-10-07drm/i915: remove IS_ACTIVELucas De Marchi1-2/+2
2021-10-04drm/i915/pxp: allocate a vcs context for pxp usageDaniele Ceraolo Spurio1-0/+2
2021-07-29drm/i915/gt: rename CNL references in intel_engine.hLucas De Marchi1-1/+1
2021-07-27drm/i915/guc: Fix for error capture after full GPU reset with GuCJohn Harrison1-0/+3
2021-07-27drm/i915/guc: Capture error state on context resetMatthew Brost1-1/+20
2021-07-27drm/i915/guc: Direct all breadcrumbs for a class to single breadcrumbsMatthew Brost1-0/+3
2021-07-27drm/i915/guc: GuC virtual enginesMatthew Brost1-1/+29
2021-06-18drm/i915: Move submission tasklet to i915_sched_engineMatthew Brost1-14/+0
2021-06-18drm/i915: Move active tracking to i915_sched_engineMatthew Brost1-2/+0
2021-06-17drm/i915/gt: Pipelined page migrationChris Wilson1-0/+1
2021-06-17drm/i915/gt: Export the pinned context constructor and destructorChris Wilson1-0/+11
2021-05-25drm/i915/gt: Move submission_method into intel_gtChris Wilson1-1/+7
2020-12-20drm/i915/gt: Another tweak for flushing the taskletsChris Wilson1-1/+6
2020-12-16drm/i915/gt: Move gen8 CS emitters into gen8_engine_cs.hChris Wilson1-86/+0
2020-11-03drm/i915/gt: Expose more parameters for emitting writes into the ringChris Wilson1-20/+35
2020-09-30drm/i915: Cancel outstanding work after disabling heartbeats on an engineChris Wilson1-0/+9
2020-09-07drm/i915/gt: Distinguish the virtual breadcrumbs from the irq breadcrumbsChris Wilson1-17/+0
2020-09-07drm/i915/gt: Replace intel_engine_transfer_stale_breadcrumbsChris Wilson1-3/+0
2020-06-18drm/i915/gt: Always report the sample time for busy-statsChris Wilson1-1/+2
2020-06-02drm/i915/gt: Split low level gen2-7 CS emittersChris Wilson1-1/+0
2020-05-14drm/i915/gt: Transfer old virtual breadcrumbs to irq_workerChris Wilson1-0/+3
2020-05-07drm/i915/gen12: Fix HDC pipeline flushMika Kuoppala1-6/+28
2020-05-01drm/i915/gt: Make timeslicing an explicit engine propertyChris Wilson1-9/+0
2020-04-30drm/i915/gt: Always enable busy-stats for execlistsChris Wilson1-3/+0
2020-04-03drm/i915/gt: Free request pool from virtual enginesChris Wilson1-0/+2
2020-03-09drm/i915/gt: Defend against concurrent updates to execlists->activeChris Wilson1-1/+14
2020-02-10drm/i915/selftests: Drop live_preempt_hangChris Wilson1-20/+0
2020-01-31drm/i915: extract engine WA programming to common resume functionDaniele Ceraolo Spurio1-0/+2
2020-01-10drm/i915: Start chopping up the GPU error captureChris Wilson1-1/+1
2019-12-24drm/i915/gt: Flush other retirees inside intel_gt_retire_requests()Chris Wilson1-1/+1
2019-12-22drm/i915/gt: Merge engine init/setup loopsChris Wilson1-2/+0
2019-12-22drm/i915/gt: Pull GT initialisation under intel_gt_init()Chris Wilson1-3/+5
2019-12-21drm/i915/gt: Repeat wait_for_idle for retirement workersChris Wilson1-1/+1
2019-12-18drm/i915/gt: Remove direct invocation of breadcrumb signalingChris Wilson1-3/+1
2019-12-13drm/i915: Introduce new macros for tracingVenkata Sandeep Dhanalakota1-0/+7
2019-12-05drm/i915/gt: Replace I915_READ with intel_uncore_readAndi Shyti1-1/+1
2019-11-25drm/i915/gt: Mark the execlists->active as the primary volatile accessChris Wilson1-3/+1
2019-10-29drm/i915/gt: Make timeslice duration configurableChris Wilson1-2/+11
2019-10-25drm/i915: Move intel_engine_context_in/out into intel_lrc.cTvrtko Ursulin1-55/+0
2019-10-24drm/i915/gt: Split intel_ring_submissionChris Wilson1-114/+0
2019-10-23drm/i915/gt: Replace hangcheck by heartbeatsChris Wilson1-32/+0
2019-10-23drm/i915/execlists: Force preemptionChris Wilson1-0/+9
2019-10-22drm/i915: Pass intel_gt to intel_engines_initTvrtko Ursulin1-1/+1
2019-10-22drm/i915: Pass intel_gt to intel_engines_setupTvrtko Ursulin1-1/+1
2019-10-22drm/i915: Pass intel_gt to intel_engines_cleanupTvrtko Ursulin1-1/+1
2019-10-22drm/i915: Pass intel_gt to intel_engines_init_mmioTvrtko Ursulin1-1/+3
2019-10-09drm/i915/gt: execlists->active is serialised by the taskletChris Wilson1-0/+14
2019-10-08drm/i915/gt: Flush submission tasklet before waiting/retiringChris Wilson1-1/+2
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