aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/gpu/drm/i915/gt/intel_sseu.c (follow)
AgeCommit message (Expand)AuthorFilesLines
2022-08-24drm/i915: move has_pooled_eu to runtime infoJani Nikula1-3/+2
2022-06-14drm/i915/pvc: Adjust EU per SS according to HAS_ONE_EU_PER_FUSE_BIT()Matt Roper1-1/+1
2022-06-02drm/i915/pvc: Add SSEU changesMatt Roper1-7/+24
2022-06-02drm/i915/sseu: Disassociate internal subslice mask representation from uapiMatt Roper1-103/+158
2022-06-02drm/i915/sseu: Don't try to store EU mask internally in UAPI formatMatt Roper1-30/+58
2022-06-02drm/i915/sseu: Simplify gen11+ SSEU handlingMatt Roper1-40/+36
2022-06-02drm/i915/xehp: Use separate sseu init functionMatt Roper1-37/+49
2022-05-03drm/i915: remove superfluous string helper includeJani Nikula1-2/+0
2022-04-21Merge drm/drm-next into drm-intel-gt-nextRodrigo Vivi1-3/+6
2022-04-11Merge drm/drm-next into drm-intel-nextJani Nikula1-3/+14
2022-03-14drm/i915/xehp: Update topology dumps for Xe_HPMatt Roper1-11/+43
2022-03-02drm/i915: Use str_yes_no()Lucas De Marchi1-3/+6
2022-03-02drm/i915/xehp: handle fused off CCS enginesDaniele Ceraolo Spurio1-3/+14
2022-02-02drm/i915: Move GT registers to their own header fileMatt Roper1-0/+1
2022-02-02drm/i915: Parameterize R_PWR_CLK_STATE register definitionMatt Roper1-1/+1
2021-09-20drm/i915/xehp: Check new fuse bits for SFC availabilityMatt Roper1-3/+2
2021-08-11drm/i915/xehpsdv: Add compute DSS typeStuart Summers1-15/+45
2021-08-05drm/i915/xehp: handle new steering optionsDaniele Ceraolo Spurio1-0/+18
2021-08-03drm/i915/dg2: DG2 uses the same sseu limits as XeHP SDVMatt Roper1-1/+1
2021-08-03drm/i915/xehpsdv: Add maximum sseu limitsMatt Roper1-1/+4
2021-08-03drm/i915/xehp: Changes to ss/eu definitionsMatthew Auld1-4/+20
2021-07-29drm/i915/gt: remove explicit CNL handling from intel_sseu.cLucas De Marchi1-79/+0
2021-06-05drm/i915/gt: replace IS_GEN and friends with GRAPHICS_VERLucas De Marchi1-7/+7
2021-03-24drm/i915/gt: SPDX cleanupChris Wilson1-2/+1
2020-10-14drm/i915/jsl: Split EHL/JSL platform info and PCI idsTejas Upadhyay1-1/+1
2020-07-08drm/i915/sseu: Move sseu_info under gt_infoVenkata Sandeep Dhanalakota1-9/+10
2020-07-08drm/i915/sseu: Move sseu detection and dump to intel_sseuDaniele Ceraolo Spurio1-0/+586
2020-03-17drm/i915/perf: introduce global sseu pinningLionel Landwerlin1-26/+7
2019-08-23drm/i915: Expand subslice maskStuart Summers1-1/+15
2019-08-23drm/i915: Use subslice stride to set subslices for a given sliceStuart Summers1-2/+4
2019-08-23drm/i915: Add function to set subslicesStuart Summers1-0/+6
2019-08-23drm/i915: Add EU stride runtime parameterStuart Summers1-0/+2
2019-08-23drm/i915: Add subslice stride runtime parameterStuart Summers1-0/+3
2019-08-23drm/i915: Add function to set SSEU info per platformStuart Summers1-0/+8
2019-08-07drm/i915/perf: Refactor oa object to better manage resourcesUmesh Nerlige Ramappa1-1/+1
2019-05-29Revert "drm/i915: Expand subslice mask"Jani Nikula1-46/+1
2019-05-28drm/i915: Expand subslice maskStuart Summers1-1/+46
2019-05-28drm/i915: Refactor sseu helper functionsStuart Summers1-0/+17
2019-04-24drm/i915: Move GraphicsTechnology files under gt/Chris Wilson1-0/+142