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path: root/drivers/gpu/drm/i915/gvt/gtt.h (follow)
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2022-01-12drm/i915/gvt: Constify intel_gvt_gtt_pte_opsRikard Falkeborn1-1/+1
2022-01-12drm/i915/gvt: Constify intel_gvt_gtt_gma_opsRikard Falkeborn1-1/+1
2020-12-22drm/i915/gvt: make gtt.h self-containedJani Nikula1-1/+10
2020-11-10drm/i915/gvt: Save/restore HW status to support GVT suspend/resumeColin Xu1-0/+4
2020-07-29drm/i915/gvt: Do not destroy ppgtt_mm during vGPU D3->D0.Colin Xu1-0/+2
2020-05-08drm/i915/gvt: Support PPGTT table load commandZhenyu Wang1-0/+1
2019-07-12drm/i915: Drop extern qualifiers from header function prototypesJanusz Krzysztofik1-6/+7
2019-04-25drm/i915/gvt: Remove typedef and let the enumeration starts from zeroAleksei Gimbitskii1-8/+8
2019-04-24Merge tag 'drm-intel-next-2019-04-17' of git://anongit.freedesktop.org/drm/drm-intel into drm-nextDave Airlie1-1/+1
2019-03-04drm/i915/gvt: Add mutual lock for ppgtt mm LRU listZhenyu Wang1-0/+1
2019-02-20drm/i915/gvt: Refine the combined intel_vgpu_oos_page struct to save memoryZhao Yakui1-1/+1
2018-11-07Merge tag 'gvt-fixes-2018-11-07' of https://github.com/intel/gvt-linux into drm-intel-fixesJoonas Lahtinen1-2/+7
2018-11-06drm/i915: Compare user's 64b GTT offset even on 32bChris Wilson1-1/+0
2018-10-31drm/i915/gvt: support inconsecutive partial gtt entry writeHang Yuan1-2/+7
2018-07-30BackMerge v4.18-rc7 into drm-nextDave Airlie1-0/+2
2018-07-09drm/i915/gvt: Add GTT clear_pse operationChangbin Du1-0/+1
2018-07-09drm/i915/gvt: Add software PTE flag to mark special 64K splited entryChangbin Du1-0/+3
2018-07-09drm/i915/gvt: Detect 64K gtt entry by IPS bit of PDEChangbin Du1-0/+2
2018-07-09drm/i915/gvt: Add PTE IPS bit operationsChangbin Du1-0/+2
2018-07-09drm/i915/gvt: Add new 64K entry typeChangbin Du1-0/+1
2018-07-02drm/i915/gvt: fix a bug of partially write ggtt entiesZhao Yan1-0/+2
2018-03-30drm/i915/gvt: Cancel dma map when resetting ggtt entriesChangbin Du1-1/+1
2018-03-19drm/i915/gvt: Invalidate vGPU PPGTT mm objects during a vGPU reset.Zhi Wang1-0/+1
2018-03-06drm/i915/gvt: Manage shadow pages with radix treeChangbin Du1-3/+1
2018-03-06drm/i915/gvt: Provide generic page_track infrastructure for write-protected pageChangbin Du1-14/+0
2018-03-06drm/i915/gvt: Rename shadow_page to short name sptChangbin Du1-1/+1
2018-03-06drm/i915/gvt: Rework shadow page management codeChangbin Du1-32/+19
2018-03-06drm/i915/gvt: Factor out intel_vgpu_{get, put}_ppgtt_mm interfaceChangbin Du1-2/+2
2018-03-06drm/i915/gvt: Rename ggtt related functions to be more specificChangbin Du1-2/+2
2018-03-06drm/i915/gvt: Refine ggtt and ppgtt root entry opsChangbin Du1-34/+0
2018-03-06drm/i915/gvt: Refine the intel_vgpu_mm reference managementChangbin Du1-11/+17
2018-03-06drm/i915/gvt: Rework shadow graphic memory management codeChangbin Du1-37/+43
2017-12-22drm/i915/gvt: move write protect handler out of mmio emulation functionZhenyu Wang1-0/+3
2017-11-16Revert "drm/i915/gvt: Refine broken PPGTT scratch"Zhenyu Wang1-6/+11
2017-11-16drm/i915/gvt: Refine broken PPGTT scratchZhi Wang1-11/+6
2017-11-16drm/i915/gvt: Introduce ops->set_present()Zhi Wang1-0/+1
2017-11-16drm/i915/gvt: Let the caller choose if a shadow page should be put into hash tableZhi Wang1-2/+2
2017-11-16drm/i915/gvt: Use I915_GTT_PAGE_SIZEZhi Wang1-4/+3
2017-11-16drm/i915/gvt: Factor intel_vgpu_page_trackZhi Wang1-17/+13
2017-08-10drm/i915/gvt: Refine the intel_vgpu_reset_gtt reset functionChuanxiao Dong1-1/+1
2017-08-10drm/i915/gvt: Add carefully checking in GTT walker pathsChangbin Du1-10/+14
2017-01-13drm/i915/gvt: introuduce intel_vgpu_reset_gtt() to reset gttChangbin Du1-0/+1
2016-12-26drm/i915/gvt: reset the GGTT entry when vGPU createdPing Gao1-0/+4
2016-11-07drm/i915/gvt: implement scratch page table tree for shadow PPGTTPing Gao1-2/+38
2016-10-14drm/i915/gvt: vGPU graphics memory virtualizationZhi Wang1-0/+270
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