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path: root/drivers/gpu/drm/i915/i915_drv.h (follow)
AgeCommit message (Expand)AuthorFilesLines
2020-03-02drm/i915/psr: Force PSR probe only after full initializationJosé Roberto de Souza1-1/+1
2020-01-14drm/i915: Update DRIVER_DATE to 20200114Jani Nikula1-2/+2
2020-01-10drm/i915: Start chopping up the GPU error captureChris Wilson1-1/+1
2020-01-08drm/i915/display: Force the state compute phase once to enable PSRJosé Roberto de Souza1-0/+1
2020-01-04drm/i915/gem: Extend mmap support for lmemAbdiel Janulgue1-3/+3
2020-01-01drm/i915/gem: Drop local vma->vm_file referenceChris Wilson1-0/+10
2020-01-01drm/i915/gt: Restore coarse power gatingChris Wilson1-2/+4
2019-12-31drm/i915: Introduce remap_io_sg() to prefault discontiguous objectsAbdiel Janulgue1-0/+3
2019-12-24drm/i915: Switch context id allocation directly to xarrayTvrtko Ursulin1-3/+3
2019-12-23drm/i915: Update DRIVER_DATE to 20191223Jani Nikula1-2/+2
2019-12-21drm/i915: Remove i915->kernel_contextChris Wilson1-3/+0
2019-12-12drm/i915/gem: Prepare gen7 cmdparser for async executionChris Wilson1-1/+3
2019-12-11drm/i915: Remove redundant parameters from intel_engine_cmd_parserChris Wilson1-6/+4
2019-12-09drm/i915/fbc: Wait for vblank after FBC disable on glk+Ville Syrjälä1-0/+1
2019-12-09drm/i915/fbc: Nuke fbc.enabledVille Syrjälä1-1/+0
2019-12-09drm/i915/fbc: Store fence_id directly in fbc cache/paramsVille Syrjälä1-6/+2
2019-12-09drm/i915/fbc: Track plane visibilityVille Syrjälä1-0/+1
2019-12-09drm/i915/fbc: Precompute gen9 cfb stride w/aVille Syrjälä1-1/+2
2019-12-09drm/i915/fbc: Nuke bogus single pipe fbc1 restrictionVille Syrjälä1-1/+0
2019-12-09drm/i915/gem: Avoid rcu_barrier() from shrinker pathsChris Wilson1-0/+1
2019-12-05drm/i915: Remove vestigal i915_gem_context locals from cmdparserChris Wilson1-2/+1
2019-12-04drm/i915: Introduce DRM_I915_GEM_MMAP_OFFSETAbdiel Janulgue1-4/+0
2019-11-26drm/i915: Support more QGV pointsStanislav Lisovskiy1-1/+5
2019-11-20drm/i915: Change .crtc_enable/disable() calling conventionVille Syrjälä1-4/+4
2019-11-20drm/i915: Change watermark hook calling conventionVille Syrjälä1-3/+3
2019-11-16drm/i915/guc: Skip suspend/resume GuC action on platforms w/o GuC submissionDon Hiatt1-0/+6
2019-11-15drm/i915/gem: Purge the sudden reappearance of i915_gem_object_pin()Chris Wilson1-8/+0
2019-11-15drm/i915: Simplify NEEDS_WaRsDisableCoarsePowerGatingChris Wilson1-1/+1
2019-11-15Merge drm/drm-next into drm-intel-next-queuedJani Nikula1-5/+24
2019-11-14Backmerge i915 security patches from commit 'ea0b163b13ff' into drm-nextDave Airlie1-3/+20
2019-11-14drm/i915/gen8+: Add RC6 CTX corruption WAImre Deak1-2/+4
2019-11-12drm/i915/bios: store child devices in a listJani Nikula1-2/+1
2019-11-12drm/i915/bios: use a flag for vbt hdmi level shift presenceJani Nikula1-6/+2
2019-11-12drm/i915: Remove leftover gem.pm_notifier memberChris Wilson1-2/+0
2019-11-05drm/i915/gen8+: Add RC6 CTX corruption WAImre Deak1-2/+6
2019-11-05drm/i915/cmdparser: Add support for backward jumpsJon Bloomfield1-3/+6
2019-11-05drm/i915: Support ro ppgtt mapped cmdparser shadow buffersJon Bloomfield1-0/+14
2019-11-05drm/i915: Remove Master tables from cmdparserJon Bloomfield1-2/+1
2019-11-05drm/i915: Disable Secure Batches for gen6+Jon Bloomfield1-0/+1
2019-11-05drm/i915/gt: Call intel_gt_sanitize() directlyChris Wilson1-2/+0
2019-11-01drm/i915/gt: Call intel_gt_sanitize() directlyChris Wilson1-2/+0
2019-11-01drm/i915/selftests: Spin on all engines simultaneouslyChris Wilson1-0/+6
2019-11-01drm/i915: Update DRIVER_DATE to 20191101Joonas Lahtinen1-1/+1
2019-11-01drm/i915: Update DRIVER_DATE to 20191101Joonas Lahtinen1-2/+2
2019-10-29drm/i915: Fix PCH reference clock for FDI on HSW/BDWVille Syrjälä1-0/+2
2019-10-26drm/i915: Split memory_region initialisation into its own fileChris Wilson1-3/+0
2019-10-26drm/i915: Extract GT render power state managementAndi Shyti1-96/+0
2019-10-25drm/i915: support creating LMEM objectsMatthew Auld1-0/+3
2019-10-25drm/i915: Add is_dgfx to device infoJosé Roberto de Souza1-0/+1
2019-10-25drm/i915: Fix PCH reference clock for FDI on HSW/BDWVille Syrjälä1-0/+2
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