aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/gpu/drm/i915/i915_gem_tiling.c (follow)
AgeCommit message (Expand)AuthorFilesLines
2012-05-03drm/i915: Only the zap the VMA after updating the tiling parametersChris Wilson1-2/+6
2012-05-03drm/i915: Clarify the semantics of tiling_changedChris Wilson1-1/+9
2012-02-08drm/i915: swizzling support for snb/ivbDaniel Vetter1-2/+17
2012-01-30drm/i915: fix swizzle detection for gen3Daniel Vetter1-2/+2
2011-10-20drm/i915: simplify swapin/out swizzle checking a bitDaniel Vetter1-10/+0
2011-10-20drm/i915: fix swizzling on gen6+Daniel Vetter1-1/+4
2011-07-18drm/i915: Fix unfenced alignment on pre-G33 hardwareChris Wilson1-1/+3
2011-05-13drm/i915: add swizzle/tiling support for Ivy BridgeJesse Barnes1-1/+1
2011-03-07Merge branch 'drm-intel-fixes' into drm-intel-nextChris Wilson1-19/+19
2011-03-07drm/i915: Rebind the buffer if its alignment constraints changes with tilingChris Wilson1-4/+17
2011-03-06Revert "drm/i915: fix corruptions on i8xx due to relaxed fencing"Chris Wilson1-15/+1
2011-03-01Merge branch 'drm-intel-fixes' into drm-intel-nextChris Wilson1-1/+15
2011-02-24drm/i915: fix corruptions on i8xx due to relaxed fencingDaniel Vetter1-1/+15
2011-02-22drm/i915: Protect against drm_gem_object not being the first memberChris Wilson1-2/+2
2011-01-27drm/i915: Defer reporting EIO until we try to use the GPUChris Wilson1-5/+0
2010-12-02drm/i915: Pipelined fencing [infrastructure]Chris Wilson1-16/+7
2010-11-23drm/i915: Use drm_i915_gem_object as the preferred typeChris Wilson1-55/+49
2010-11-15drm/i915: Fix current tiling check for relaxed fencingChris Wilson1-8/+14
2010-10-29drm/i915: Only enforce fence limits inside the GTT.Chris Wilson1-11/+21
2010-10-21drm/i915: IS_IRONLAKE is synonymous with gen == 5Chris Wilson1-1/+1
2010-09-25drm/i915: Adjust hangcheck EIO semanticsChris Wilson1-1/+5
2010-09-21drm/i915: INTEL_INFO->gen supercedes i8xx, i9xx, i965gChris Wilson1-14/+16
2010-09-14drm/i915: Allow get_fence_reg() to be uninterruptibleChris Wilson1-1/+1
2010-09-08drm/i915: Remove impossible error handling from bit17 swizzlingChris Wilson1-11/+3
2010-08-10drm: Use ENOENT consistently for the error return for an unmatched handle.Chris Wilson1-2/+2
2010-08-01drm/i915: Remove the WARN when failing to set tiling.Chris Wilson1-2/+0
2010-05-10drm/i915: don't allow tiling changes on pinned buffers v2Daniel Vetter1-0/+5
2010-04-18drm/i915: fix tiling limits for i915 class hw v2Daniel Vetter1-13/+9
2010-03-25drm/i915: introduce to_intel_bo helperDaniel Vetter1-5/+5
2010-03-18drm/intel: fix up set_tiling for untiled->tiled transitionDaniel Vetter1-2/+5
2010-02-26drm/i915: Add initial bits for VGA modesetting bringup on Sandybridge.Eric Anholt1-1/+1
2010-02-25Merge remote branch 'anholt/drm-intel-next' into drm-next-stageDave Airlie1-162/+1
2010-02-22drm/i915: reduce some of the duplication of tiling checkingOwain Ainsworth1-34/+1
2010-02-22drm/i915: blow away userspace mappings before fence changeDaniel Vetter1-6/+0
2010-02-16drm/i915: Keep MCHBAR always enabledZhenyu Wang1-122/+0
2010-02-11Use drm_gem_object_[handle_]unreference_unlocked where possibleLuca Barbieri1-3/+1
2010-01-06drm/i915: execbuf2 supportJesse Barnes1-24/+22
2009-12-07drm/i915: Fix product names and #definesAdam Jackson1-2/+2
2009-11-05drm/i915: Replace DRM_DEBUG with DRM_DEBUG_DRIVERZhao Yakui1-1/+1
2009-09-08drm/i915: get the bridge device once.Dave Airlie1-45/+20
2009-09-04drm/i915: fix tiling on IGDNGZhenyu Wang1-8/+7
2009-07-10drm/i915: Zap the GTT mapping when transitioning from untiled to tiled.Eric Anholt1-0/+6
2009-06-18drm/i915: check for CONFIG_PNP before using pnp functionKeith Packard1-0/+2
2009-06-18drm/i915: Clear fence register on tiling stride change.Chris Wilson1-16/+51
2009-06-09drm/i915: enable MCHBAR if neededJesse Barnes1-0/+145
2009-06-05drm/i915: Disable tiling on IGDNG for nowZhenyu Wang1-0/+7
2009-05-26drm/i915: Fix tiling pitch handling on 8xx.Eric Anholt1-3/+11
2009-04-17drm/i915: fix transition to I915_TILING_NONEKeith Packard1-1/+0
2009-04-08drm/i915: Allow tiling of objects with bit 17 swizzling by the CPU.Eric Anholt1-2/+109
2009-04-01drm/i915: fix up tiling/fence reg setup on i8xx class hwDaniel Vetter1-0/+16