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path: root/drivers/gpu/drm/i915/i915_irq.c (follow)
AgeCommit message (Expand)AuthorFilesLines
2014-12-18drm/i915: Don't call intel_prepare_page_flip() multiple times on gen2-4Ville Syrjälä1-4/+2
2014-12-15drm/i915: move RPS PM_IER enabling to gen6_enable_rps_interruptsImre Deak1-3/+13
2014-12-11drm/i915: vlv: fix IRQ masking when uninstalling interruptsImre Deak1-1/+1
2014-12-03drm/i915: mask RPS IRQs properly when disabling RPSImre Deak1-7/+20
2014-12-03drm/i915: Tune down spurious CRC interrupt warningDaniel Vetter1-1/+1
2014-12-03drm/i915: Grab modeset locks for GPU rest on pre-ctgVille Syrjälä1-1/+4
2014-12-03drm/i915: Stop gathering error states for CS error interruptsDaniel Vetter1-18/+7
2014-11-20drm/i915: Only call mod_timer() if not already pendingChris Wilson1-3/+4
2014-11-19drm/i915: Remove DRI1 ring accessors and APIChris Wilson1-6/+0
2014-11-19drm/i915: sanitize rps irq disablingImre Deak1-7/+16
2014-11-19drm/i915: sanitize rps irq enablingImre Deak1-1/+13
2014-11-19drm/i915: WARN if we receive any rps interrupts on gen>9Imre Deak1-3/+3
2014-11-19drm/i915: Don't continually defer the hangcheckChris Wilson1-3/+6
2014-11-14drm/i915: Use vlv display irq setup code for chvVille Syrjälä1-35/+2
2014-11-14drm/i915: Refactor vlv_display_irq_uninstall()Ville Syrjälä1-10/+15
2014-11-14drm/i915/skl: AUX irqs have movedJesse Barnes1-4/+13
2014-11-14drm/i915: WARN if we receive any gen9 rps interruptsImre Deak1-0/+5
2014-11-14drm/i915: move rps irq enable/disable to i915_irq.cImre Deak1-0/+41
2014-11-14drm/i915: unify gen6/gen8 rps irq handlerImre Deak1-14/+6
2014-11-14drm/i915: unify gen6/gen8 pm irq helpersImre Deak1-49/+10
2014-11-07drm/i915: Make mmio flip wait for seqno in the work functionAnder Conselvan de Oliveira1-3/+0
2014-11-07drm/i915: Kill leftover GTIIR writes from valleyview_irq_preinstall()Ville Syrjälä1-4/+0
2014-11-07drm/i915: Drop useless VLV_IIR writes from vlv_display_irq_postinstall()Ville Syrjälä1-3/+0
2014-11-07drm/i914: Refactor vlv_display_irq_postinstall()Ville Syrjälä1-3/+8
2014-11-07drm/i915: Refactor vlv_display_irq_reset()Ville Syrjälä1-23/+17
2014-11-07drm/i915: Make valleyview_display_irqs_(un)install() work for chvVille Syrjälä1-10/+17
2014-11-07drm/i915: Call gen5_gt_irq_reset() from valleyview_irq_uninstall()Ville Syrjälä1-0/+2
2014-11-07drm/i915: Use GEN5_IRQ_RESET() on vlv/chvVille Syrjälä1-20/+5
2014-11-07drm/i915: Use a consistent order between IIR, IER, IMR writes on vlv/chvVille Syrjälä1-11/+18
2014-11-07drm/i915: Drop the extra GEN8_PCU_IIR posting read from cherryview_irq_preinstall()Ville Syrjälä1-2/+0
2014-11-07drm/i915: Use gen8_gt_irq_reset() in cherryview_irq_uninstall()Ville Syrjälä1-26/+2
2014-11-07drm/i915: Use DPINVGTT_STATUS_MASKVille Syrjälä1-1/+1
2014-11-07drm/i915: Apply some ocd for IMR vs. IER order during irq enableVille Syrjälä1-4/+4
2014-10-24drm/i915: Filter gmch fifo underruns in the shared handlerDaniel Vetter1-3/+3
2014-10-24drm/i915: Add wrappers to handle fifo underrun interruptsDaniel Vetter1-51/+21
2014-10-24drm/i915: Use dev_priv in public intel_fifo_underrun.c functionsDaniel Vetter1-13/+22
2014-10-24drm/i915: Extract intel_fifo_underrun.cDaniel Vetter1-292/+5
2014-10-21Merge branch 'drm-intel-next-fixes' into drm-intel-nextDaniel Vetter1-30/+11
2014-10-16drm/i915: fix short vs. long hpd detectionJani Nikula1-7/+7
2014-10-08drm/i915: properly reenable gen8 pipe IRQsPaulo Zanoni1-2/+3
2014-10-03drm/i915: kerneldoc for interrupt enable/disable functionsDaniel Vetter1-2/+59
2014-10-03drm/i915: Use dev_priv instead of dev in irq setup functionsDaniel Vetter1-22/+18
2014-10-03drm/i915: s/pm._irqs_disabled/pm.irqs_enabled/Daniel Vetter1-5/+21
2014-10-01drm/i915: Bikeshed rpm functions name a bit.Daniel Vetter1-3/+3
2014-09-30Merge branch 'topic/skl-stage1' into drm-intel-next-queuedDaniel Vetter1-11/+30
2014-09-29Revert "drm/i915/bdw: BDW Software Turbo"Daniel Vetter1-21/+0
2014-09-24drm/i915/skl: Adjust the display engine interruptsDamien Lespiau1-9/+28
2014-09-24drm/i915/skl: SKL shares the same underrun interrupt as BDWDamien Lespiau1-1/+1
2014-09-24drm/i915/skl: Skylake shares the interrupt logic with BroadwellDamien Lespiau1-1/+1
2014-09-19drm/i915: Clarify irq_lock locking, special casesDaniel Vetter1-10/+6
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