Age | Commit message (Expand) | Author | Files | Lines |
2018-06-11 | drm/i915/skl: Add warn about unsupported CDCLK rates | ![](https://seccdn.libravatar.org/avatar/52a953973ce5d89545cb0cee96f7bcd9?s=13&d=retro) Imre Deak | 1 | -0/+10 |
2018-05-03 | drm/i915: Adjust eDP's logical vco in a reliable place. | ![](https://seccdn.libravatar.org/avatar/f58d3f0a3b3e92890cd23147b7b0ccab?s=13&d=retro) Rodrigo Vivi | 1 | -4/+37 |
2018-04-23 | drm/i915/audio: set minimum CD clock to twice the BCLK | ![](https://seccdn.libravatar.org/avatar/a52890a0b2ba2dd1b144891541eb6b98?s=13&d=retro) Abhay Kumar | 1 | -2/+14 |
2018-04-05 | Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial | ![](https://seccdn.libravatar.org/avatar/fb47627bc8c0bcdb36321edfbf02e916?s=13&d=retro) Linus Torvalds | 1 | -2/+2 |
2018-03-27 | treewide: Fix typos in printk | ![](https://seccdn.libravatar.org/avatar/f5cc521884b064c7dfc0d4faf4c4d326?s=13&d=retro) Masanari Iida | 1 | -2/+2 |
2018-02-14 | drm/i915/vlv: Add cdclk workaround for DSI | ![](https://seccdn.libravatar.org/avatar/a0a26bd7c15115cac8ab9662e5b34093?s=13&d=retro) Hans de Goede | 1 | -0/+8 |
2018-02-13 | drm/i915/icl: add the main CDCLK functions | ![](https://seccdn.libravatar.org/avatar/03e73f995a8b7df482ad09838ceb98b6?s=13&d=retro) Paulo Zanoni | 1 | -2/+235 |
2018-02-09 | drm/i915: Use INTEL_GEN everywhere | ![](https://seccdn.libravatar.org/avatar/a029ebb6879a9baa658949bed6a9e4ab?s=13&d=retro) Tvrtko Ursulin | 1 | -1/+1 |
2018-02-06 | drm/i915/bxt, glk: Increase PCODE timeouts during CDCLK freq changing | ![](https://seccdn.libravatar.org/avatar/52a953973ce5d89545cb0cee96f7bcd9?s=13&d=retro) Imre Deak | 1 | -5/+17 |
2018-02-01 | drm/i915/bxt, glk: Avoid long atomic poll during CDCLK change | ![](https://seccdn.libravatar.org/avatar/52a953973ce5d89545cb0cee96f7bcd9?s=13&d=retro) Imre Deak | 1 | -2/+2 |
2018-02-01 | drm/i915/bxt, glk: Increase PCODE timeouts during CDCLK freq changing | ![](https://seccdn.libravatar.org/avatar/52a953973ce5d89545cb0cee96f7bcd9?s=13&d=retro) Imre Deak | 1 | -5/+17 |
2018-01-19 | drm/i915/icp: Get/set proper Raw clock frequency on ICP | ![](https://seccdn.libravatar.org/avatar/d8449fbc828a05ad7bfedd79c0150d09?s=13&d=retro) Anusha Srivatsa | 1 | -2/+27 |
2018-01-18 | drm/i915: Add tracking for CDCLK bypass frequency | ![](https://seccdn.libravatar.org/avatar/52a953973ce5d89545cb0cee96f7bcd9?s=13&d=retro) Imre Deak | 1 | -17/+18 |
2018-01-18 | BackMerge tag 'v4.15-rc8' into drm-next | ![](https://seccdn.libravatar.org/avatar/482d553e042192056107839bf3f6637e?s=13&d=retro) Dave Airlie | 1 | -9/+26 |
2018-01-04 | drm/i915: Apply Display WA #1183 on skl, kbl, and cfl | ![](https://seccdn.libravatar.org/avatar/c9b1e5e5f3f04d7eacc02955db77b3fd?s=13&d=retro) Lucas De Marchi | 1 | -9/+26 |
2017-12-23 | drm/i915/vlv: Add cdclk workaround for DSI | ![](https://seccdn.libravatar.org/avatar/a0a26bd7c15115cac8ab9662e5b34093?s=13&d=retro) Hans de Goede | 1 | -0/+8 |
2017-12-22 | drm/i915: Apply Display WA #1183 on skl, kbl, and cfl | ![](https://seccdn.libravatar.org/avatar/c9b1e5e5f3f04d7eacc02955db77b3fd?s=13&d=retro) Lucas De Marchi | 1 | -9/+26 |
2017-11-30 | drm/i915: Make ips_enabled a property depending on whether IPS is enabled, v3. | ![](https://seccdn.libravatar.org/avatar/8d78a1d4bc87e65a85b64a03c81bcd90?s=13&d=retro) Maarten Lankhorst | 1 | -1/+1 |
2017-10-25 | drm/i915/cnl: Allow 2 pixel per clock on Cannonlake. | ![](https://seccdn.libravatar.org/avatar/f58d3f0a3b3e92890cd23147b7b0ccab?s=13&d=retro) Rodrigo Vivi | 1 | -12/+2 |
2017-10-25 | drm/i915: Perform a central cdclk state sanity check | ![](https://seccdn.libravatar.org/avatar/487f7745e50542e02ecbdc7c7bf70026?s=13&d=retro) Ville Syrjälä | 1 | -11/+19 |
2017-10-25 | drm/i915: Sanity check cdclk in vlv_set_cdclk() | ![](https://seccdn.libravatar.org/avatar/487f7745e50542e02ecbdc7c7bf70026?s=13&d=retro) Ville Syrjälä | 1 | -0/+12 |
2017-10-25 | drm/i915: Adjust system agent voltage on CNL if required by DDI ports | ![](https://seccdn.libravatar.org/avatar/487f7745e50542e02ecbdc7c7bf70026?s=13&d=retro) Ville Syrjälä | 1 | -1/+45 |
2017-10-25 | drm/i915: Use cdclk_state->voltage on CNL | ![](https://seccdn.libravatar.org/avatar/487f7745e50542e02ecbdc7c7bf70026?s=13&d=retro) Ville Syrjälä | 1 | -16/+31 |
2017-10-25 | drm/i915: Use cdclk_state->voltage on BXT/GLK | ![](https://seccdn.libravatar.org/avatar/487f7745e50542e02ecbdc7c7bf70026?s=13&d=retro) Ville Syrjälä | 1 | -2/+21 |
2017-10-25 | drm/i915: Use cdclk_state->voltage on SKL/KBL/CFL | ![](https://seccdn.libravatar.org/avatar/487f7745e50542e02ecbdc7c7bf70026?s=13&d=retro) Ville Syrjälä | 1 | -7/+36 |
2017-10-25 | drm/i915: Use cdclk_state->voltage on BDW | ![](https://seccdn.libravatar.org/avatar/487f7745e50542e02ecbdc7c7bf70026?s=13&d=retro) Ville Syrjälä | 1 | -6/+29 |
2017-10-25 | drm/i915: Use cdclk_state->voltage on VLV/CHV | ![](https://seccdn.libravatar.org/avatar/487f7745e50542e02ecbdc7c7bf70026?s=13&d=retro) Ville Syrjälä | 1 | -16/+38 |
2017-10-25 | drm/i915: Start tracking voltage level in the cdclk state | ![](https://seccdn.libravatar.org/avatar/487f7745e50542e02ecbdc7c7bf70026?s=13&d=retro) Ville Syrjälä | 1 | -7/+24 |
2017-10-25 | drm/i915: Clean up some cdclk switch statements | ![](https://seccdn.libravatar.org/avatar/487f7745e50542e02ecbdc7c7bf70026?s=13&d=retro) Ville Syrjälä | 1 | -34/+34 |
2017-10-11 | drm/i915: Move rps.hw_lock to dev_priv and s/hw_lock/pcu_lock | ![](https://seccdn.libravatar.org/avatar/d7fbedfd721dae85dae2c69074d3ce0c?s=13&d=retro) Sagar Arun Kamble | 1 | -20/+20 |
2017-09-12 | drm/i915: Increase poll time for BDW FCLK_DONE | ![](https://seccdn.libravatar.org/avatar/8c7ed3324164d7f9199e1267c208a5cb?s=13&d=retro) Marta Lofstedt | 1 | -1/+5 |
2017-08-31 | drm/i915: Consolidate max_cdclk_freq check in intel_crtc_compute_min_cdclk() | ![](https://seccdn.libravatar.org/avatar/487f7745e50542e02ecbdc7c7bf70026?s=13&d=retro) Ville Syrjälä | 1 | -52/+44 |
2017-08-31 | drm/i915: Track minimum acceptable cdclk instead of "minimum dotclock" | ![](https://seccdn.libravatar.org/avatar/487f7745e50542e02ecbdc7c7bf70026?s=13&d=retro) Ville Syrjälä | 1 | -98/+104 |
2017-06-29 | drm/i915: reintroduce VLV/CHV PFI programming power domain workaround | ![](https://seccdn.libravatar.org/avatar/3045793477c208c0d2c530a22821cc84?s=13&d=retro) Gabriel Krisman Bertazi | 1 | -0/+20 |
2017-06-12 | drm/i915/cnl: Allow dynamic cdclk changes on CNL | ![](https://seccdn.libravatar.org/avatar/f58d3f0a3b3e92890cd23147b7b0ccab?s=13&d=retro) Rodrigo Vivi | 1 | -4/+56 |
2017-06-12 | drm/i915/cnl: Implement CNL display init/unit sequence | ![](https://seccdn.libravatar.org/avatar/487f7745e50542e02ecbdc7c7bf70026?s=13&d=retro) Ville Syrjälä | 1 | -1/+107 |
2017-06-12 | drm/i915/cnl: Implement .set_cdclk() for CNL | ![](https://seccdn.libravatar.org/avatar/487f7745e50542e02ecbdc7c7bf70026?s=13&d=retro) Ville Syrjälä | 1 | -0/+106 |
2017-06-12 | drm/i915/cnl: Implement .get_display_clock_speed() for CNL | ![](https://seccdn.libravatar.org/avatar/487f7745e50542e02ecbdc7c7bf70026?s=13&d=retro) Ville Syrjälä | 1 | -1/+55 |
2017-06-02 | drm/i915/cnp: Get/set proper Raw clock frequency on CNP. | ![](https://seccdn.libravatar.org/avatar/f58d3f0a3b3e92890cd23147b7b0ccab?s=13&d=retro) Rodrigo Vivi | 1 | -1/+28 |
2017-05-05 | drm/i915: Fix rawclk readout for g4x | ![](https://seccdn.libravatar.org/avatar/487f7745e50542e02ecbdc7c7bf70026?s=13&d=retro) Ville Syrjälä | 1 | -4/+2 |
2017-04-06 | drm/i915/glk: limit pixel clock to 99% of cdclk workaround | ![](https://seccdn.libravatar.org/avatar/837e67d622052a2ce3376fa92c0ed809?s=13&d=retro) Madhav Chauhan | 1 | -3/+13 |
2017-03-22 | drm/i915: Implement cdclk restrictions based on Azalia BCLK | ![](https://seccdn.libravatar.org/avatar/e417342c93f0f24d0c32b3f4046b9781?s=13&d=retro) Pandiyan, Dhinakaran | 1 | -0/+12 |
2017-03-22 | drm/i915/glk: Apply cdclk workaround for DP audio | ![](https://seccdn.libravatar.org/avatar/e417342c93f0f24d0c32b3f4046b9781?s=13&d=retro) Pandiyan, Dhinakaran | 1 | -6/+11 |
2017-03-13 | drm/i915: Use new atomic iterator macros in cdclk | ![](https://seccdn.libravatar.org/avatar/8d78a1d4bc87e65a85b64a03c81bcd90?s=13&d=retro) Maarten Lankhorst | 1 | -1/+1 |
2017-03-07 | drm/i915: remove potentially confusing IS_G4X checks | ![](https://seccdn.libravatar.org/avatar/03e73f995a8b7df482ad09838ceb98b6?s=13&d=retro) Paulo Zanoni | 1 | -2/+2 |
2017-02-08 | drm/i915: Replace the .modeset_commit_cdclk() hook with a more direct .set_cdclk() hook | ![](https://seccdn.libravatar.org/avatar/487f7745e50542e02ecbdc7c7bf70026?s=13&d=retro) Ville Syrjälä | 1 | -46/+33 |
2017-02-08 | drm/i915: Nuke the VLV/CHV PFI programming power domain workaround | ![](https://seccdn.libravatar.org/avatar/487f7745e50542e02ecbdc7c7bf70026?s=13&d=retro) Ville Syrjälä | 1 | -14/+0 |
2017-02-08 | drm/i915: Move PFI credit reprogramming into vlv/chv_set_cdclk() | ![](https://seccdn.libravatar.org/avatar/487f7745e50542e02ecbdc7c7bf70026?s=13&d=retro) Ville Syrjälä | 1 | -1/+4 |
2017-02-08 | drm/i915: Pass the cdclk state to the set_cdclk() functions | ![](https://seccdn.libravatar.org/avatar/487f7745e50542e02ecbdc7c7bf70026?s=13&d=retro) Ville Syrjälä | 1 | -30/+48 |
2017-02-08 | drm/i915: Pass dev_priv to remainder of the cdclk functions | ![](https://seccdn.libravatar.org/avatar/487f7745e50542e02ecbdc7c7bf70026?s=13&d=retro) Ville Syrjälä | 1 | -15/+10 |