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path: root/drivers/gpu/drm/i915/intel_display.c (follow)
AgeCommit message (Expand)AuthorFilesLines
2018-06-19drm/i915: Check timings against hardware maximumsVille Syrjälä1-0/+35
2018-06-19drm/i915: Nuke the cursor size definesVille Syrjälä1-4/+4
2018-06-14drm/i915/icl: unconditionally init DDI for every portPaulo Zanoni1-1/+8
2018-06-14drm/i915/icl: add icelake_get_ddi_pll()Paulo Zanoni1-1/+41
2018-06-14drm/i915/ddi: Push pipe clock enabling to encodersImre Deak1-6/+0
2018-06-14drm/i915/ddi: s/crtc->config/old_crtc_state in haswell_crtc_disable()Imre Deak1-4/+4
2018-06-13drm/i915: Allow DBLSCAN user modes with eDP/LVDS/DSIVille Syrjälä1-3/+13
2018-06-01drm/i915/icl: introduce tc_portPaulo Zanoni1-0/+16
2018-06-01drm/i915: Configure SKL+ scaler initial phase correctlyVille Syrjälä1-0/+41
2018-06-01drm/i915: Remove bogus NV12 PLANE_COLOR_CTL setupVille Syrjälä1-6/+1
2018-06-01drm/i915: Disable trickle feed for SNB/IVB cursorsVille Syrjälä1-0/+3
2018-06-01drm/i915: Clean up cursor definesVille Syrjälä1-8/+8
2018-06-01drm/i915: Have plane->get_hw_state() return the current pipeVille Syrjälä1-20/+51
2018-05-31drm/i915: Call intel_opregion_notify_encoder in intel_sanitize_encoder, v2.Maarten Lankhorst1-0/+3
2018-05-25drm/i915: Simplify ilk-ivb underrun suppressionVille Syrjälä1-8/+4
2018-05-25drm/i915: Try to suppress more spurious PCH underruns on ILK-IVBVille Syrjälä1-2/+9
2018-05-25drm/i915: Initialize panel_pipe to INVALID_PIPEVille Syrjälä1-1/+1
2018-05-23drm/i915/icl: Disable pipe CSC and gamma in cursor planeJosé Roberto de Souza1-4/+6
2018-05-23drm/i915: WARN if power sequencer is not connected to the LVDS port on pre-ilkVille Syrjälä1-0/+5
2018-05-23drm/i915: Implement the missing bits of assert_panel_unlocked()Ville Syrjälä1-2/+16
2018-05-23drm/i915: Clean up DP pipe select bitsVille Syrjälä1-31/+15
2018-05-23drm/i915: Nuke intel_trans_dp_port_sel()Ville Syrjälä1-25/+14
2018-05-23drm/i915: Parametrize TRANS_DP_PORT_SELVille Syrjälä1-16/+8
2018-05-23drm/i915: Move intel_ddi_get_crtc_new_encoder() out from ddi codeVille Syrjälä1-1/+30
2018-05-22drm/i915: Move GEM BO inside drm_framebufferDaniel Stone1-2/+2
2018-05-22drm/i915: Use intel_fb_obj() everywhereDaniel Stone1-9/+10
2018-05-17drm/i915: enable the pipe/transcoder/planes later on HSW+Paulo Zanoni1-5/+5
2018-05-17drm/i915: Clean up SDVO pipe select bitsVille Syrjälä1-30/+16
2018-05-17drm/i915: Clean up LVDS pipe select bitsVille Syrjälä1-26/+7
2018-05-17drm/i915: Clean up ADPA pipe select bitsVille Syrjälä1-19/+5
2018-05-11drm/i915: Add NV12 as supported format for primary planeChandra Konduru1-2/+48
2018-05-11drm/i915: Add NV12 support to intel_framebuffer_initChandra Konduru1-0/+22
2018-05-11drm/i915: Add skl_check_nv12_surface for NV12Maarten Lankhorst1-2/+27
2018-05-11drm/i915: Enable Display WA 0528Vidya Srinivas1-3/+19
2018-05-11drm/i915: Enable display workaround 827 for all planes, v2.Maarten Lankhorst1-17/+26
2018-05-07drm/i915/icl: add basic support for the ICL clocksPaulo Zanoni1-0/+16
2018-05-03drm/i915: Correctly populate user mode h/vdisplay with pipe src size during readoutVille Syrjälä1-0/+2
2018-05-02Merge drm/drm-next into drm-intel-next-queuedJani Nikula1-1/+3
2018-04-27drm/i915/icl: Enable 2nd DBuf slice only when neededMahesh Kumar1-0/+10
2018-04-27drm/i915/icl: track dbuf slice-2 statusMahesh Kumar1-0/+5
2018-04-27drm/i915/icl: Don't set pipe CSC/Gamma in PLANE_COLOR_CTLJames Ausmus1-2/+6
2018-04-19drm/i915: Protect PIPE_CONF_CHECK macros with do {} while(0)Ville Syrjälä1-18/+27
2018-04-18drm/i915: Pack params to engine->schedule() into a structChris Wilson1-1/+10
2018-04-10drm/i915: Add debugfs file to clear FIFO underruns.Maarten Lankhorst1-12/+18
2018-04-09drm/i915: Remove last references to drm_atomic_get_existing* macrosMaarten Lankhorst1-29/+24
2018-04-09drm/i915: Upscale scaler max scale for NV12Chandra Konduru1-11/+37
2018-04-09drm/i915: Enable YUV to RGB for Gen10 in Plane Ctrl RegVidya Srinivas1-1/+6
2018-04-09drm/i915: Display WA 827Vidya Srinivas1-0/+34
2018-04-09drm/i915/skl+: support verification of DDB HW state for NV12Mahesh Kumar1-1/+1
2018-04-09drm/i915/skl+: add NV12 in skl_format_to_fourccMahesh Kumar1-0/+2
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