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path: root/drivers/gpu/drm/i915/intel_drv.h (follow)
AgeCommit message (Expand)AuthorFilesLines
2018-12-03drm/i915/icl: Add get config functionality for DSIVandita Kulkarni1-0/+2
2018-12-03drm/i915/icl: push pll to port mapping/unmapping to ddi encoder hooksJani Nikula1-6/+0
2018-11-29i915/dp/fec: Add fec_enable to the crtc state.Anusha Srivatsa1-0/+3
2018-11-29drm/i915/dsc: Enable and disable appropriate power wells for VDSCManasi Navare1-0/+2
2018-11-29drm/i915/dp: Enable/Disable DSC in DP SinkGaurav K Singh1-0/+3
2018-11-29drm/i915/dsc: Define & Compute VESA DSC paramsGaurav K Singh1-0/+4
2018-11-29drm/i915/dp: Add DSC params and DSC config to intel_crtc_stateManasi Navare1-0/+9
2018-11-28drm/i915: Commit skl+ planes in an order that avoids ddb overlapsVille Syrjälä1-4/+4
2018-11-28drm/i915: Move ddb/wm programming into plane update/disable hooks on skl+Ville Syrjälä1-0/+9
2018-11-28drm/i915: Pass the new crtc_state to ->disable_plane()Ville Syrjälä1-1/+1
2018-11-28drm/i915: Introduce crtc_state->update_planes bitmaskVille Syrjälä1-0/+3
2018-11-22drm/i915: Check PSR errors instead of retrain while PSR is enabledJosé Roberto de Souza1-0/+1
2018-11-21drm/i915: Add rotation readout for plane initial configVille Syrjälä1-0/+1
2018-11-15drm/i915: Fix plane allocation/free functionsMaarten Lankhorst1-3/+2
2018-11-13drm/i915: Account for scale factor when calculating initial phaseVille Syrjälä1-1/+1
2018-11-09drm/i915: Generalize skl_ddb_allocation_overlaps()Ville Syrjälä1-4/+3
2018-11-08drm/i915: Keep overlay functions naming consistentJosé Roberto de Souza1-2/+2
2018-11-05drm/i915/icl: Configure MG DP mode for HDMI ports tooImre Deak1-1/+0
2018-11-05drm/i915/icl: Configure MG PHY gating for HDMI ports tooImre Deak1-2/+0
2018-11-02i915/dp/fec: Cache the FEC_CAPABLE DPCD registerAnusha Srivatsa1-0/+1
2018-11-02drm/i915/icl+: Sanitize port to PLL mappingImre Deak1-0/+1
2018-11-02drm/i915: Use a helper to get the aux power domainImre Deak1-1/+2
2018-11-02drm/i915: Move aux_ch to intel_digital_portImre Deak1-1/+2
2018-11-01drm/i915/icl: Find DSI presence for ICLMadhav Chauhan1-0/+3
2018-10-31drm/i915/dp: Add helpers for Compressed BPP and Slice Count for DSCManasi Navare1-0/+4
2018-10-31drm/i915/dp: Cache the DP/eDP DSC DPCD register set on Hotplug/eDP InitManasi Navare1-0/+1
2018-10-30drm/i915/icl: Enable DC9 as lowest possible state during screen-offAnimesh Manna1-0/+3
2018-10-29drm/i915: wrapping all hdcp var into intel_hdcpRamalingam C1-5/+10
2018-10-24drm/i915/gen11: Program the scalers correctly for planar formats, v3.Maarten Lankhorst1-0/+8
2018-10-24drm/i915/gen11: Link nv12 Y and UV planes in the atomic state, v5.Maarten Lankhorst1-0/+53
2018-10-24drm/i915/debugfs: hdcp capability of a sinkRamalingam C1-0/+7
2018-10-18drm/i915/quirks: pass dev_priv instead of drm dev to quirk codeJani Nikula1-1/+1
2018-10-17drm/i915: split out display quirks to a new fileJani Nikula1-0/+3
2018-10-17drm/i915: rename and move intel_get_pipe_from_connector()Jani Nikula1-2/+1
2018-10-16drm/i915/icl: create function to identify combophy portMahesh Kumar1-0/+1
2018-10-16drm/i915: Make intel_dp_set_m_n take crtc_stateMaarten Lankhorst1-1/+2
2018-10-15drm/i915: Add YCBCR 4:2:0/4:4:4 support for LSPCONShashank Sharma1-0/+5
2018-10-15drm/i915: Write AVI infoframes for MCA LSPCONShashank Sharma1-0/+4
2018-10-15drm/i915: Add AVI infoframe support for LSPCONShashank Sharma1-1/+12
2018-10-15drm/i915: Check LSPCON vendor OUIShashank Sharma1-0/+6
2018-10-15drm/i915: Add CRTC output format YCBCR 4:4:4Shashank Sharma1-0/+1
2018-10-15drm/i915: Add CRTC output format YCBCR 4:2:0Shashank Sharma1-3/+1
2018-10-15drm/i915: Introduce CRTC output formatShashank Sharma1-0/+8
2018-10-10drm/i915: move intel connector specific functions to intel_connector.cJani Nikula1-7/+9
2018-10-10drm/i915: rename intel_modes.c to intel_connector.cJani Nikula1-10/+8
2018-10-09drm/i915: add a common connector type independent destroy hookJani Nikula1-0/+1
2018-10-09drm/i915: Do intel_panel_destroy_backlight() laterVille Syrjälä1-1/+0
2018-10-08drm/i915: Extract skl_universal_plane_init()Ville Syrjälä1-14/+3
2018-10-08drm/i915: Introduce intel_plane_alloc()Ville Syrjälä1-0/+2
2018-10-01drm/i915: Pass intel_encoder to infoframe functionsVille Syrjälä1-3/+3
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