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path: root/drivers/gpu/drm/i915/intel_pm.c (follow)
AgeCommit message (Expand)AuthorFilesLines
2015-05-19drm/i915: fix screen flickeringThomas Gummerer1-13/+11
2015-03-26drm/i915/skl: fix semicolon.cocci warningskbuild test robot1-1/+1
2015-03-23drm/i915/skl: Take 90/270 rotation into account in watermark calculationsTvrtko Ursulin1-1/+17
2015-03-20drm/i915: Use down ei for manual Baytrail RPS calculationsChris Wilson1-3/+2
2015-03-20drm/i915: Improved w/a for rps on BaytrailChris Wilson1-2/+20
2015-03-20drm/i915: Relax RPS contraints to allows setting minfreq on idleChris Wilson1-16/+28
2015-03-17drm/i915/skl: Enable the RPS interrupts programmingAkash Goel1-14/+3
2015-03-17drm/i915/skl: Updated the gen9_enable_rps functionAkash Goel1-15/+13
2015-03-17drm/i915/skl: Updated the gen6_rps_limits functionAkash Goel1-5/+11
2015-03-17drm/i915/skl: Restructured the gen6_set_rps_thresholds functionAkash Goel1-36/+32
2015-03-17drm/i915/skl: Updated the gen6_set_rps functionAkash Goel1-1/+4
2015-03-17drm/i915/skl: Updated the gen6_init_rps_frequencies functionAkash Goel1-0/+7
2015-03-17drm/i915/skl: Updated intel_gpu_freq() and intel_freq_opcode()Akash Goel1-2/+6
2015-03-17drm/i915: Use FW_WM() macro for older gmch platforms tooVille Syrjälä1-20/+22
2015-03-17drm/i915: Add polish to VLV WM shift+mask operationsVille Syrjälä1-33/+41
2015-03-17drm/i915: Don't assume primary & cursor are always on for wm calculation (v4)Matt Roper1-23/+39
2015-03-17drm/i915: Disable DDR DVFS on CHVVille Syrjälä1-0/+34
2015-03-17drm/i915: Enable the maxfifo PM5 mode when appropriate on CHVVille Syrjälä1-0/+18
2015-03-17drm/i915: Rewrite VLV/CHV watermark codeVille Syrjälä1-140/+160
2015-03-17drm/i915: Use crtc->state->active in ilk/skl watermark calculations (v3)Matt Roper1-8/+8
2015-03-17drm/i915: Make sure PND deadline mode is enabled on VLV/CHVVille Syrjälä1-6/+13
2015-03-17drm/i915: Read out display FIFO size on VLV/CHVVille Syrjälä1-0/+55
2015-03-17drm/i915: Pass plane to vlv_compute_drain_latency()Ville Syrjälä1-26/+16
2015-03-17drm/i915: Reorganize VLV DDL setupVille Syrjälä1-15/+31
2015-03-17drm/i915: Hide VLV DDL precision handlingVille Syrjälä1-48/+26
2015-03-17drm/i915: Simplify VLV drain latency computationVille Syrjälä1-4/+7
2015-03-17drm/i915: Kill DRAIN_LATENCY_PRECISION_* definesVille Syrjälä1-8/+4
2015-03-17drm/i915: Reduce CHV DDL multiplier to 16/8Ville Syrjälä1-4/+4
2015-03-17drm/i915: Remove ironlake rc6 supportJohn Harrison1-155/+0
2015-03-17drm/i915: Make for_each_plane() take dev_priv as argumentDamien Lespiau1-5/+4
2015-03-17drm/i915: Use plane->state->fb in watermark code (v2)Matt Roper1-11/+11
2015-03-17drm/i915: Kill intel_crtc->cursor_{width, height} (v2)Matt Roper1-6/+6
2015-03-09Merge tag 'drm-intel-next-2015-02-27' of git://anongit.freedesktop.org/drm-intel into drm-nextDave Airlie1-28/+91
2015-03-05Merge tag 'drm-intel-next-2015-02-14' of git://anongit.freedesktop.org/drm-intel into drm-nextDave Airlie1-43/+71
2015-02-27drm/i915/skl: Update watermarks for Y tilingTvrtko Ursulin1-9/+46
2015-02-27drm/i915/skl: Updated watermark programmingTvrtko Ursulin1-21/+33
2015-02-24drm/i915/skl: Make sure to allocate mininum sizes in the DDBDamien Lespiau1-4/+18
2015-02-13drm/i915/skl: Implement WaEnableLbsSlaRetryTimerDecrementDamien Lespiau1-0/+11
2015-02-13drm/i915/skl: Implement WaDisableChickenBitTSGBarrierAckForFFSliceCSDamien Lespiau1-1/+6
2015-02-13drm/i915/skl: Implement WaDisableHDCInvalidationDamien Lespiau1-0/+6
2015-02-13drm/i915/skl: Implement WaDisableLSQCROPERFforOCLDamien Lespiau1-0/+5
2015-02-13drm/i915/skl: Implement WaSetGAPSunitClckGateDisableDamien Lespiau1-1/+2
2015-02-13drm/i915/skl: Make the init clock gating function skylake specificDamien Lespiau1-2/+2
2015-02-13drm/i915/skl: Document the WM read latency W/A with its nameDamien Lespiau1-0/+2
2015-02-13drm/i915: Disable power management for i915 driver in VMYu Zhang1-0/+4
2015-02-13drm/i915: Support not having an init clock gating function definedDamien Lespiau1-1/+2
2015-02-13drm/i915/gen9: Implement Wa4x4STCOptimizationDisableHoath, Nicholas1-4/+0
2015-02-13drm/i915/gen9: Implement WaDisableSDEUnitClockGatingHoath, Nicholas1-6/+8
2015-02-13drm/i915/gen9: Implement WaDisableDgMirrorFixInHalfSliceChicken5Nick Hoath1-8/+0
2015-02-13drm/i915: Introduce intel_set_rps()Ville Syrjälä1-25/+28
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