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path: root/drivers/gpu/drm/i915/intel_pm.c (follow)
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2020-07-09drm/i915: Document FBC related w/as more thoroughlyVille Syrjälä1-11/+44
2020-07-09drm/i915: Limit WaFbcHighMemBwCorruptionAvoidance to skl and bxtVille Syrjälä1-4/+8
2020-07-09drm/i915: Don't do WaFbcTurnOffFbcWatermark for glkVille Syrjälä1-2/+16
2020-07-09drm/i915: Move all FBC w/as to .init_clock_gating()Ville Syrjälä1-0/+23
2020-07-08drm/i915: Use the gt in HAS_ENGINEDaniele Ceraolo Spurio1-1/+1
2020-07-03drm/i915/fbc: Allow FBC to recompress after a 3D workload on i85x/i865Ville Syrjälä1-0/+10
2020-07-01drm/i915: Fix g4x fbc watermark enableVille Syrjälä1-12/+21
2020-06-11drm/i915/gt: Move gen4 GT workarounds from init_clock_gating to workaroundsChris Wilson1-15/+0
2020-06-11drm/i915/gt: Move ilk GT workarounds from init_clock_gating to workaroundsChris Wilson1-10/+0
2020-06-11drm/i915/gt: Move snb GT workarounds from init_clock_gating to workaroundsChris Wilson1-33/+0
2020-06-11drm/i915/gt: Move vlv GT workarounds from init_clock_gating to workaroundsChris Wilson1-61/+0
2020-06-11drm/i915/gt: Move ivb GT workarounds from init_clock_gating to workaroundsChris Wilson1-48/+0
2020-06-11drm/i915/gt: Move hsw GT workarounds from init_clock_gating to workaroundsChris Wilson1-37/+2
2020-06-02drm/i915: Identify Cometlake platformChris Wilson1-3/+7
2020-05-22drm/i915: Fix includes and local vars orderStanislav Lisovskiy1-1/+1
2020-05-21drm/i915: Adjust CDCLK accordingly to our DBuf bw needsStanislav Lisovskiy1-2/+29
2020-05-19drm/i915/pm: Prefer drm_WARN_ON over WARN_ONPankaj Bharadiya1-25/+38
2020-05-18drm/i915/display: Return error from dbuf allocation failureChris Wilson1-1/+1
2020-05-18drm/i915: Fix dbuf slice mask when turning off all the pipesVille Syrjälä1-0/+24
2020-05-16drm/i915: Clean up dbuf debugs during .atomic_check()Ville Syrjälä1-7/+19
2020-05-16drm/i915: Move the dbuf pre/post plane updateVille Syrjälä1-0/+37
2020-05-16drm/i915: Nuke skl_ddb_get_hw_state()Ville Syrjälä1-7/+0
2020-05-16drm/i915: Introduce proper dbuf stateVille Syrjälä1-59/+126
2020-05-16drm/i915: Make skl_compute_dbuf_slices() behave consistently for all platformsVille Syrjälä1-1/+1
2020-05-14drm/i915: Enable SAGV support for Gen12Stanislav Lisovskiy1-4/+0
2020-05-14drm/i915: Restrict qgv points which don't have enough bandwidth.Stanislav Lisovskiy1-2/+51
2020-05-14drm/i915: Add TGL+ SAGV supportStanislav Lisovskiy1-17/+91
2020-05-13drm/i915: Make active_pipes check skl specificStanislav Lisovskiy1-5/+9
2020-05-13drm/i915: Extract skl SAGV checkingStanislav Lisovskiy1-2/+8
2020-05-13drm/i915: Introduce skl_plane_wm_level accessor.Stanislav Lisovskiy1-2/+21
2020-05-11drm/i915: Fix glk watermark calculationsVille Syrjälä1-7/+8
2020-05-04drm/i915: Don't enable WaIncreaseLatencyIPCEnabled when IPC is disabledSultan Alsawaf1-1/+1
2020-05-04drm/i915: Remove cnl pre-prod workaroundsVille Syrjälä1-7/+0
2020-05-04drm/i915: Track active_pipes in bw_stateStanislav Lisovskiy1-13/+14
2020-05-04drm/i915: Use bw state for per crtc SAGV evaluationStanislav Lisovskiy1-28/+89
2020-04-28drm/i915/tgl: Wa_14011059788Matt Atwood1-0/+4
2020-04-21drm/i915: drop a bunch of superfluous inlinesJani Nikula1-4/+3
2020-04-17drm/i915: Add pre/post plane updates for SAGVStanislav Lisovskiy1-0/+16
2020-04-17drm/i915: Prepare to extract gen specific functions from intel_can_enable_sagvStanislav Lisovskiy1-25/+36
2020-04-14drm/i915: Start passing latency as parameterStanislav Lisovskiy1-4/+8
2020-03-05drm/i915: Implement display w/a 1140 for glk/cnlVille Syrjälä1-4/+9
2020-03-05drm/i915: Enable transition watermarks for glkVille Syrjälä1-4/+7
2020-03-05drm/i915: Don't check for wm changes until we've compute the wms fullyVille Syrjälä1-4/+12
2020-03-05drm/i915: Don't check uv_wm in skl_plane_wm_equals()Ville Syrjälä1-2/+6
2020-03-03drm/i915/tgl: Move and restrict Wa_1408615072José Roberto de Souza1-4/+0
2020-03-03drm/i915/gen11: Moving WAs to rcs_engine_wa_init()José Roberto de Souza1-15/+0
2020-03-03drm/i915: move watermark structs more towards usageJani Nikula1-0/+24
2020-03-02drm/i915: Use a sentinel to terminate the dbuf slice arraysVille Syrjälä1-21/+13
2020-03-02drm/i915: Add missing commas to dbuf tablesVille Syrjälä1-44/+44
2020-03-02drm/i915: Remove garbage WARNsVille Syrjälä1-11/+0
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