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path: root/drivers/gpu/drm/i915/intel_pm.c (follow)
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2021-12-03drm/i915/fbc: Eliminate racy intel_fbc_is_active() usageVille Syrjälä1-7/+2
2021-12-02drm/i915/dg2: extend Wa_1409120013 to DG2Matt Atwood1-2/+2
2021-12-02drm/i915/crtc: rename intel_get_crtc_for_plane() to intel_crtc_for_plane()Jani Nikula1-2/+2
2021-12-02drm/i915/crtc: rename intel_get_crtc_for_pipe() to intel_crtc_for_pipe()Jani Nikula1-4/+4
2021-11-24Revert "drm/i915/dg2: Tile 4 plane format support"Stanislav Lisovskiy1-1/+0
2021-11-23drm/i915/dg2: Tile 4 plane format supportStanislav Lisovskiy1-0/+1
2021-11-19drm/i915/dg2: Implement WM0 cursor WA for DG2Stanislav Lisovskiy1-5/+13
2021-11-11drm/i915/fbc: Start passing around intel_fbcVille Syrjälä1-1/+1
2021-11-11drm/i915/fbc: Clean up all register definesVille Syrjälä1-7/+7
2021-10-29Merge drm/drm-next into drm-intel-nextJani Nikula1-0/+12
2021-10-28BackMerge tag 'v5.15-rc7' into drm-nextDave Airlie1-0/+12
2021-10-21drm/i915: Move intel_format_info_is_yuv_semiplanar() to intel_fb.cImre Deak1-0/+1
2021-10-18drm/i915: Avoid bitwise vs logical OR warning in snb_wm_latency_quirk()Nathan Chancellor1-3/+3
2021-10-14drm/i915: split out intel_pcode.[ch] to separate fileJani Nikula1-1/+1
2021-10-14drm/i915: split out vlv sideband to a separate fileJani Nikula1-0/+1
2021-10-05drm/i915: Extend the async flip VT-d w/a to skl/bxtVille Syrjälä1-0/+12
2021-10-04drm/i195: Make the async flip VT-d workaround dynamicVille Syrjälä1-26/+0
2021-10-04drm/i915: Extend the async flip VT-d w/a to skl/bxtVille Syrjälä1-0/+12
2021-09-29drm/i915: constify display wm vtableDave Airlie1-23/+57
2021-09-29drm/i915: constify clock gating init vtable.Dave Airlie1-24/+54
2021-09-29drm/i915: split watermark vfuncs from display vtable.Dave Airlie1-20/+20
2021-09-29drm/i915: split clock gating init from display vtableDave Airlie1-24/+24
2021-09-29drm/i915/wm: provide wrappers around watermark vfuncs calls (v3)Dave Airlie1-39/+0
2021-09-29drm/i915: make update_wm take a dev_priv.Dave Airlie1-13/+7
2021-09-29drm/i915/pm: drop get_fifo_size vfunc.Dave Airlie1-9/+11
2021-09-23drm/i915: Fix HPLL watermark readout for g4xVille Syrjälä1-2/+5
2021-09-22drm/i915: Apply WaUse32BppForSRWM to elk as well as ctgVille Syrjälä1-8/+4
2021-09-22drm/i915: Fix g4x cxsr enable conditionVille Syrjälä1-3/+2
2021-09-22drm/i915: Use u8 consistently for active_planes bitmaskVille Syrjälä1-3/+3
2021-08-25drm/i915/dg2: Memory latency values from pcode must be doubledMatt Roper1-14/+15
2021-08-12Merge tag 'drm-intel-next-2021-08-10-1' of git://anongit.freedesktop.org/drm/drm-intel into drm-nextDave Airlie1-42/+121
2021-08-12Merge tag 'drm-intel-gt-next-2021-08-06-1' of ssh://git.freedesktop.org/git/drm/drm-intel into drm-nextDave Airlie1-14/+8
2021-07-30drm/i915: remove explicit CNL handling from intel_pm.cLucas De Marchi1-40/+1
2021-07-22drm/i915/dg2: Add dbuf programmingMatt Roper1-1/+119
2021-07-21drm/i915: Make display workaround upper bounds exclusiveMatt Roper1-1/+1
2021-07-21drm/i915: Make GT workaround upper bounds exclusiveMatt Roper1-3/+3
2021-07-21drm/i915: Program DFR enable/disable as a GT workaroundMatt Roper1-8/+0
2021-07-14Merge branch 'topic/revid_steppings' into drm-intel-nextMatt Roper1-1/+1
2021-07-14Merge branch 'topic/revid_steppings' into drm-intel-gt-nextMatt Roper1-1/+1
2021-07-14drm/i915/dg1: Use revid->stepping tablesMatt Roper1-1/+1
2021-07-13drm/i915: Settle on "adl-x" in WA commentsJosé Roberto de Souza1-2/+2
2021-06-25drm/i915/display: use max_level to control loopLucas De Marchi1-5/+4
2021-06-25drm/i915/display: fix level 0 adjustement on display ver >= 12Lucas De Marchi1-6/+7
2021-06-24drm/i915: Clean up pre-skl wm calling conventionVille Syrjälä1-47/+52
2021-06-15drm/i915/adl_p: Add initial ADL_P WorkaroundsClint Taylor1-3/+5
2021-06-09drm/i915/adl_p: Same slices mask is not same Dbuf stateStanislav Lisovskiy1-2/+4
2021-06-07drm/i915: replace IS_GEN and friends with GRAPHICS_VERLucas De Marchi1-7/+7
2021-06-04drm/i915: Initialize the mbus_offset to fix Klockwork issueManasi Navare1-1/+1
2021-05-19drm/i915/adl_p: MBUS programmingVandita Kulkarni1-8/+84
2021-05-19drm/i915: Introduce MBUS relative dbuf offsetsVille Syrjälä1-6/+34
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