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path: root/drivers/gpu/drm/i915
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2022-09-12drm/i915/mtl: Add display power wellsImre Deak5-1/+186
2022-09-12drm/i915/mtl: Add gmbus and gpio supportRadhakrishna Sripada2-0/+16
2022-09-12drm/i915: Move display and media IP version to runtime infoRadhakrishna Sripada5-43/+54
2022-09-12drm/i915/gt: Extract function to apply media fusesLucas De Marchi1-65/+72
2022-09-12drm/i915/gt: Use MEDIA_VER() when handling media fusesLucas De Marchi1-5/+4
2022-09-12Revert "drm/i915/display: Re-add check for low voltage sku for max dp source rate"Ville Syrjälä1-29/+3
2022-09-12drm/i915/gt: Fix perf limit reasons bit positionsAshutosh Dixit1-8/+8
2022-09-12drm/i915/guc: Cancel GuC engine busyness worker synchronouslyUmesh Nerlige Ramappa1-1/+6
2022-09-12drm/i915: Set correct domains values at _i915_vma_move_to_activeNirmoy Das1-1/+2
2022-09-12drm/i915/vdsc: Set VDSC PIC_HEIGHT before using for DP DSCAnkit Nautiyal3-1/+3
2022-09-12drm/i915/mtl: Hook up interrupts for standalone mediaMatt Roper4-0/+31
2022-09-12drm/i915/mtl: Use primary GT's irq lock for media GTMatt Roper17-65/+80
2022-09-12drm/i915/xelpmp: Expose media as another GTMatt Roper7-0/+84
2022-09-12drm/i915/mtl: Add gsi_offset when emitting aux table invalidationMatt Roper3-9/+18
2022-09-12drm/i915/uncore: Add GSI offset to uncoreMatt Roper3-4/+41
2022-09-12drm/i915: Handle each GT on init/release and suspend/resumeMatt Roper1-17/+42
2022-09-12drm/i915: Initialize MMIO access for each GTMatt Roper3-11/+24
2022-09-12drm/i915: Use a DRM-managed action to release the PCI bridge deviceMatt Roper1-3/+9
2022-09-12drm/i915: Rename and expose common GT early init routineMatt Roper2-3/+4
2022-09-12drm/i915: Prepare more multi-GT initializationMatt Roper7-3/+80
2022-09-12drm/i915: Drop intel_gt_tile_cleanup()Matt Roper2-18/+8
2022-09-12drm/i915: Use managed allocations for extra uncore objectsMatt Roper1-4/+2
2022-09-12drm/i915: Only hook up uncore->debug for primary uncoreMatt Roper4-17/+20
2022-09-12drm/i915: Move locking and unclaimed check into mmio_debug_{suspend, resume}Matt Roper1-20/+21
2022-09-12drm/i915/gt: Fix perf limit reasons bit positionsAshutosh Dixit1-8/+8
2022-09-12Revert "drm/i915/dg2: extend Wa_1409120013 to DG2"Lucas De Marchi1-3/+2
2022-09-12drm/i915/guc: Cancel GuC engine busyness worker synchronouslyUmesh Nerlige Ramappa1-1/+6
2022-09-12drm/i915/gsc: allocate extended operational memory in LMEMTomas Winkler2-7/+75
2022-09-12drm/i915/gsc: add GSC XeHP SDV platform definitionAlexander Usyskin1-0/+15
2022-09-12drm/i915/gsc: add slow_firmware flag to the gsc device definitionAlexander Usyskin1-0/+2
2022-09-12drm/i915/gsc: skip irq initialization if using pollingVitaly Lubart1-3/+7
2022-09-12Merge tag 'drm-intel-gt-next-2022-09-09' of git://anongit.freedesktop.org/drm/drm-intel into drm-nextDave Airlie53-548/+930
2022-09-12Merge drm/drm-next into drm-intel-nextJani Nikula14-127/+171
2022-09-11Merge tag 'drm-misc-next-2022-09-09' of git://anongit.freedesktop.org/drm/drm-misc into drm-nextDave Airlie6-104/+146
2022-09-09drm/i915: Use REG_FIELD_GET() to extract skl+ wm latenciesVille Syrjälä2-18/+12
2022-09-09drm/i915: Extract skl_watermark.cVille Syrjälä16-3541/+3579
2022-09-09drm/i915: Split intel_read_wm_latency() into per-platform versionsVille Syrjälä1-80/+99
2022-09-09drm/i915/dsb: hide struct intel_dsb betterJani Nikula5-29/+32
2022-09-08drm/i915: Round TMDS clock to nearestVille Syrjälä2-2/+3
2022-09-08drm/i915: Use a fixed N value alwaysVille Syrjälä5-29/+24
2022-09-08drm/i915: Allow M/N change during fastset on bdw+Ville Syrjälä3-8/+43
2022-09-08drm/i915: Add intel_panel_highest_mode()Ville Syrjälä2-0/+18
2022-09-08drm/i915: Skip intel_modeset_pipe_config_late() if the pipe is not enabledVille Syrjälä1-3/+5
2022-09-08drm/i915: Nuke fastet state copy hacksVille Syrjälä1-25/+3
2022-09-08drm/i915: Set active dpll early for icl+Ville Syrjälä1-0/+6
2022-09-08drm/i915: Make all clock checks non-fuzzyVille Syrjälä1-15/+4
2022-09-08drm/i915: Make M/N checks non-fuzzyVille Syrjälä2-45/+13
2022-09-08drm/i915: Compute clocks earlierVille Syrjälä1-4/+4
2022-09-08drm/i915: Feed the DPLL output freq back into crtc_stateVille Syrjälä7-12/+117
2022-09-08drm/i915: Reassign DPLLs only for crtcs going throug .compute_config()Ville Syrjälä2-20/+3
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