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path: root/drivers/gpu/drm/i915
AgeCommit message (Expand)AuthorFilesLines
2022-03-21drm/i915: Tweak plane ddb allocation trackingVille Syrjälä6-91/+74
2022-03-21drm/i915/display/adlp: More voltage swing table updatesJosé Roberto de Souza1-4/+18
2022-03-21drm/i915/sdvo: prefer __packed over __attribute__((packed))Jani Nikula1-1/+1
2022-03-21drm/i915/gem: Don't evict unmappable VMAs when pinning with PIN_MAPPABLE (v2)Vivek Kasireddy1-1/+12
2022-03-21drm/i915: Fix renamed struct fieldLucas De Marchi1-1/+1
2022-03-21drm/i915: Fix PSF GV point mask when SAGV is not possibleVille Syrjälä1-1/+2
2022-03-21drm/i915: Treat SAGV block time 0 as SAGV disabledVille Syrjälä1-4/+6
2022-03-21drm/i915: Reject unsupported TMDS rates on ICL+Ville Syrjälä1-0/+9
2022-03-21drm/i915/gt: Add sysfs throttle frequency interfacesSujaritha Sundaresan4-0/+107
2022-03-21drm/i915/gt: Create per-tile RPS sysfs interfacesAndi Shyti2-177/+283
2022-03-21drm/i915/gt: Create per-tile RC6 sysfs interfaceAndi Shyti5-128/+279
2022-03-21drm/i915/gt: create per-tile sysfs interfaceAndi Shyti7-1/+151
2022-03-21drm/i915: Prepare for multiple GTsTvrtko Ursulin10-46/+184
2022-03-21drm/i915/gt: add gt_is_root() helperAndi Shyti1-0/+5
2022-03-21drm/i915: Rename INTEL_REGION_LMEM with INTEL_REGION_LMEM_0Andi Shyti9-16/+16
2022-03-18drm/i915: Add logical mapping for video decode enginesMatthew Brost1-5/+17
2022-03-18drm/i915: Fix renamed struct fieldLucas De Marchi1-1/+1
2022-03-18drm/i915: Rename QGV request/response bitsVille Syrjälä2-10/+17
2022-03-18drm/i915: Unconfuses QGV vs. PSF point masksVille Syrjälä2-19/+19
2022-03-18drm/i915: Fix PSF GV point mask when SAGV is not possibleVille Syrjälä1-1/+2
2022-03-18drm/i915: Rename pre-icl SAGV enable/disable functionsVille Syrjälä1-18/+14
2022-03-18drm/i915: Reject excessive SAGV block timeVille Syrjälä1-0/+6
2022-03-18drm/i915: Probe whether SAGV works on pre-iclVille Syrjälä1-0/+14
2022-03-18drm/i915: Rework SAGV block time probingVille Syrjälä1-15/+21
2022-03-18drm/i915: Treat SAGV block time 0 as SAGV disabledVille Syrjälä1-4/+6
2022-03-18drm/i915/dg2: Add preemption changes for Wa_14015141709Akeem G Abodunrin2-1/+4
2022-03-17drm/i915/uapi: Add query for hwconfig blobRodrigo Vivi1-0/+23
2022-03-17drm/i915/guc: Add fetch of hwconfig blobJohn Harrison7-0/+199
2022-03-17drm/i915: include uapi/drm/i915_drm.h directly where neededJani Nikula5-3/+7
2022-03-17drm/i915: move i915_gem_object_needs_bit17_swizzle() to i915_gem_tiling.[ch]Jani Nikula5-10/+13
2022-03-16drm/i915: fixup the initial fb base on DGFXMatthew Auld1-6/+44
2022-03-16drm/i915/display: Check mappable aperture when pinning preallocated vmaCQ Tang1-1/+5
2022-03-16drm/i915/ttm: wire up the object offsetMatthew Auld6-6/+28
2022-03-16drm/i915: add i915_gem_object_create_region_at()Matthew Auld12-74/+77
2022-03-16drm/i915/stolen: consider I915_BO_ALLOC_GPU_ONLYMatthew Auld1-0/+8
2022-03-16drm/i915/stolen: don't treat small BAR as an errorAkeem G Abodunrin2-19/+46
2022-03-16drm/i915/lmem: don't treat small BAR as an errorMatthew Auld1-2/+4
2022-03-16drm/i915: Reject unsupported TMDS rates on ICL+Ville Syrjälä1-0/+9
2022-03-16drm/i915: Deal with bigjoiner vs. DRRSVille Syrjälä1-1/+15
2022-03-16drm/i915: Do DRRS disable/enable during pre/post_plane_update()Ville Syrjälä4-50/+10
2022-03-16drm/i915: Schedule DRRS work from intel_drrs_enable()Ville Syrjälä1-2/+8
2022-03-16drm/i915: Don't cancel/schedule drrs work if the pipe wasn't affectedVille Syrjälä1-9/+8
2022-03-16drm/i915: Determine DRRS frontbuffer_bits ahead of timeVille Syrjälä2-1/+11
2022-03-16drm/i915: Fix DRRS frontbuffer_bits handlingVille Syrjälä1-2/+4
2022-03-16drm/i915: Add missing tab to DRRS debugfsVille Syrjälä1-1/+1
2022-03-16drm/i915: Put the downclock_mode check back into can_enable_drrs()Ville Syrjälä1-3/+5
2022-03-16drm/i915: Use drm_mode_copy()Ville Syrjälä1-5/+10
2022-03-16drm/i915/display: Do not re-enable PSR after it was marked as not reliableJosé Roberto de Souza1-0/+4
2022-03-16drm/i915/display: Fix HPD short pulse handling for eDPJosé Roberto de Souza3-5/+5
2022-03-15drm/i915: Add support for steered register writesMatt Roper3-10/+70
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