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path: root/drivers/gpu/drm/i915
AgeCommit message (Expand)AuthorFilesLines
2022-02-23drm/i915: Dump the crtc hw state alwaysVille Syrjälä1-9/+7
2022-02-23Revert "drm/i915/display/vrr: Reset VRR capable property on a long hpd"Ville Syrjälä1-13/+4
2022-02-22drm/i915/adl-n: Add PCH Support for Alder Lake NTejas Upadhyay2-0/+2
2022-02-22drm/i915/display/vrr: Reset VRR capable property on a long hpdManasi Navare1-4/+13
2022-02-22drm/i915/guc/slpc: Use wrapper for reading RP_STATE_CAPVinay Belgaumkar1-2/+3
2022-02-22drm/i915/guc/slpc: Correct the param count for unset paramVinay Belgaumkar1-1/+1
2022-02-22drm/i915/gt: use get_reset_domain() helperTejas Upadhyay1-32/+42
2022-02-22drm: implement a method to free unused pagesArunpravin1-0/+10
2022-02-22drm: implement top-down allocation methodArunpravin1-0/+3
2022-02-22drm: improve drm_buddy_alloc functionArunpravin2-34/+35
2022-02-21drm/i915/adlp: Add TypeC PHY TBT->DP-alt/legacy mode switch workaroundImre Deak2-1/+24
2022-02-21drm/i915/pxp: prefer forward declaration over includesJani Nikula1-1/+1
2022-02-21drm/i915/reg: split out icl_dsi_regs.hJani Nikula4-333/+344
2022-02-21drm/i915/reg: split out vlv_dsi_regs.h and vlv_dsi_pll_regs.hJani Nikula8-575/+595
2022-02-21drm/i915/dsi: add separate init timer mask definition for ICL DSIJani Nikula2-1/+2
2022-02-21drm/i915/dsi: disassociate VBT video transfer mode from register valuesJani Nikula4-19/+39
2022-02-21drm/i915/dg2: Print PHY name properly on calibration errorMatt Roper1-1/+1
2022-02-21drm/i915: Fix bw atomic check when switching between SAGV vs. no SAGVVille Syrjälä1-2/+16
2022-02-21drm/i915: Correctly populate use_sagv_wm for all pipesVille Syrjälä1-11/+11
2022-02-21drm/i915: Disconnect PHYs left connected by BIOS on disabled portsImre Deak1-6/+20
2022-02-21drm/i915: Widen the QGV point maskVille Syrjälä1-4/+4
2022-02-19drm/i915/lmem: Enable lmem for platforms with Flat CCSAbdiel Janulgue4-2/+46
2022-02-19drm/i915/xehpsdv: Add has_flat_ccs to device infoCQ Tang3-0/+8
2022-02-19drm/i915/migrate: add acceleration support for DG2Matthew Auld1-32/+164
2022-02-19drm/i915/gtt: add xehpsdv_ppgtt_insert_entryMatthew Auld1-2/+48
2022-02-19drm/i915/gtt: allow overriding the pt alignmentMatthew Auld2-5/+21
2022-02-19drm/i915: add gtt misalignment testRobert Beckett1-0/+126
2022-02-19drm/i915: support 64K GTT pages for discrete cardsMatthew Auld4-3/+169
2022-02-19drm/i915: enforce min GTT alignment for discrete cardsMatthew Auld5-41/+119
2022-02-19drm/i915: add needs_compact_pt flagRamalingam C3-3/+11
2022-02-18drm/i915: Kill the fake lmem supportLucas De Marchi8-149/+2
2022-02-18drm/i915/dg2: Enable 5th portMatt Roper4-3/+20
2022-02-18drm/i915/dg2: Drop 38.4 MHz MPLLB tablesMatt Roper1-207/+1
2022-02-18drm/i915: Fix for PHY_MISC_TC1 offsetJouni Högander2-3/+5
2022-02-18drm/i915: Pimp icl+ sagv pre/post updateVille Syrjälä1-18/+17
2022-02-18drm/i915: Split pre-icl vs. icl+ SAGV hooks apartVille Syrjälä1-40/+74
2022-02-18drm/i915: Fix bw atomic check when switching between SAGV vs. no SAGVVille Syrjälä1-2/+16
2022-02-18drm/i915: Correctly populate use_sagv_wm for all pipesVille Syrjälä1-11/+11
2022-02-18drm/i915: Drop pointless i830 PIPECONF readVille Syrjälä1-4/+2
2022-02-18drm/i915: Make the CHV CGM CSC register writes locklessVille Syrjälä1-10/+10
2022-02-18drm/i915: Make the pipe/output CSC register writes locklessVille Syrjälä1-40/+40
2022-02-18drm/i915: Move PIPE_CHICKEN RMW out from the vblank evade critical sectionVille Syrjälä1-3/+5
2022-02-18drm/i915/display: Implement Wa_16013835468José Roberto de Souza2-7/+46
2022-02-18drm/i915/display: Group PSR2 prog sequences and workaroundsJosé Roberto de Souza1-40/+37
2022-02-18drm/i915/display/tgl+: Implement new PLL programming stepJosé Roberto de Souza8-13/+65
2022-02-18drm/i915: Disconnect PHYs left connected by BIOS on disabled portsImre Deak1-6/+20
2022-02-18drm/i915/dp: remove accidental static on what should be a local variableJani Nikula1-1/+1
2022-02-18drm/i915: Polish ilk+ wm register bitsVille Syrjälä3-51/+49
2022-02-18drm/i915: Introduce intel_crtc_planes_update_arm()Ville Syrjälä3-18/+23
2022-02-18drm/i915: Clean up SSKPD/MLTR definesVille Syrjälä3-26/+25
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