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path: root/drivers/gpu/drm/i915
AgeCommit message (Expand)AuthorFilesLines
2021-08-11drm/i915/xehpsdv: Add compute DSS typeStuart Summers3-17/+50
2021-08-11drm/i915/dg2: Report INSTDONE_GEOM values in error stateMatt Roper4-2/+19
2021-08-11drm/i915/xehp: Loop over all gslices for INSTDONE processingMatt Roper4-32/+65
2021-08-11drm/i915/display: Fix the 12 BPC bits for PIPE_MISC regAnkit Nautiyal2-15/+35
2021-08-10drm/i915/xehp: Xe_HP shadowed registers are a strict superset of gen12Matt Roper2-40/+13
2021-08-10drm/i915/gen12: Update shadowed register tableMatt Roper1-9/+14
2021-08-10drm/i915/gen11: Update shadowed register tableMatt Roper1-8/+14
2021-08-10drm/i915: Make shadow tables range-basedMatt Roper4-103/+108
2021-08-10drm/i915: Re-use gen11 forcewake read functions on gen12Matt Roper1-5/+1
2021-08-10drm/i915: correct name of GT forcewake domain in error messagesMatt Roper1-1/+1
2021-08-10Merge tag 'gvt-fixes-2021-08-10' of https://github.com/intel/gvt-linux into drm-intel-fixesRodrigo Vivi2-0/+3
2021-08-09drm/i915/gvt: Fix cached atomics setting for Windows VMZhenyu Wang2-0/+3
2021-08-06drm/i915: Disable bonding on gen12+ platformsMatthew Brost1-0/+7
2021-08-06drm/i915/dg2: Add support for new DG2-G11 revid 0x5Matt Roper1-0/+1
2021-08-05drm/i915/dg2: Add SQIDI steeringMatt Roper2-5/+25
2021-08-05drm/i915/dg2: Update steering tablesMatt Roper1-1/+10
2021-08-05drm/i915/xehpsdv: Define steering tablesMatt Roper2-3/+27
2021-08-05drm/i915/xehp: handle new steering optionsDaniele Ceraolo Spurio10-6/+163
2021-08-05drm/i915/userptr: Probe existence of backing struct pages upon creationChris Wilson2-1/+41
2021-08-05drm/i915: delete gpu reloc codeDaniel Vetter2-360/+1
2021-08-05drm/i915: Disable gpu relocationsDaniel Vetter1-23/+16
2021-08-05drm/i915: fix i915_globals_exit() section mismatch errorRandy Dunlap1-1/+1
2021-08-03drm/i915/dg2: DG2 uses the same sseu limits as XeHP SDVMatt Roper1-1/+1
2021-08-03drm/i915/xehpsdv: Add maximum sseu limitsMatt Roper3-3/+6
2021-08-03drm/i915/xehp: Changes to ss/eu definitionsMatthew Auld3-6/+27
2021-08-03drm/i915/dg2: Add forcewake tableMatt Roper1-137/+168
2021-08-03drm/i915/display/adl_p: Correctly program MBUS DBOX A creditsJosé Roberto de Souza1-4/+12
2021-08-03drm/i915/guc/rc: Setup and enable GuCRC featureVinay Belgaumkar8-15/+155
2021-08-03drm/i915/guc/slpc: Add SLPC selftestVinay Belgaumkar3-0/+313
2021-08-03drm/i915/guc/slpc: Sysfs hooks for SLPCVinay Belgaumkar5-67/+207
2021-08-03drm/i915/guc/slpc: Cache platform frequency limitsVinay Belgaumkar3-0/+151
2021-08-03drm/i915/guc/slpc: Enable ARAT timer interruptVinay Belgaumkar3-0/+27
2021-08-03drm/i915/guc/slpc: Add debugfs for SLPC infoVinay Belgaumkar3-0/+54
2021-08-03drm/i915/guc/slpc: Add get max/min freq hooksVinay Belgaumkar2-0/+78
2021-08-03drm/i915/guc/slpc: Add methods to set min/max frequencyVinay Belgaumkar2-0/+91
2021-08-03drm/i915/guc/slpc: Remove BUG_ON in guc_submission_disableVinay Belgaumkar1-4/+0
2021-08-03drm/i915/guc/slpc: Enable SLPC and add related H2G eventsVinay Belgaumkar3-0/+215
2021-08-03drm/i915/guc/slpc: Allocate, initialize and release SLPCVinay Belgaumkar3-1/+43
2021-08-03drm/i915/guc/slpc: Adding SLPC communication interfacesVinay Belgaumkar4-1/+245
2021-08-03drm/i915/guc/slpc: Gate Host RPS when SLPC is enabledVinay Belgaumkar2-1/+24
2021-08-03drm/i915/guc/slpc: Initial definitions for SLPCVinay Belgaumkar8-2/+105
2021-08-03drm/i915: Apply CMTG clock disabling WA while DPLL0 is enabledImre Deak2-19/+33
2021-08-03drm/i915: Call i915_globals_exit() if pci_register_device() failsJason Ekstrand2-1/+2
2021-08-03drm/i915: Correct SFC_DONE register offsetMatt Roper1-1/+1
2021-08-02drm/i915: Correct SFC_DONE register offsetMatt Roper1-1/+1
2021-08-02drm/i915/dg1: Adjust the AUDIO power domainAnshuman Gupta5-19/+223
2021-07-30drm/i915/xehp: Fix missing sentinel on mcr_ranges_xehpLucas De Marchi1-0/+1
2021-07-30drm/i915: finish removal of CNLLucas De Marchi5-29/+7
2021-07-30drm/i915: rename/remove CNL registersLucas De Marchi2-146/+48
2021-07-30drm/i915: remove GRAPHICS_VER == 10Lucas De Marchi5-19/+13
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