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path: root/drivers/gpu/drm/i915
AgeCommit message (Expand)AuthorFilesLines
2021-07-26drm/i915/gt: nuke gen6_hw_idLucas De Marchi3-16/+11
2021-07-26drm/i915/display: split DISPLAY_VER 9 and 10 in intel_setup_outputs()Lucas De Marchi1-1/+7
2021-07-26drm/i915: fix not reading DSC disable fuse in GLKLucas De Marchi1-4/+5
2021-07-26drm/i915/bios: Fix ports maskRodrigo Vivi1-1/+2
2021-07-26Backmerge tag 'v5.14-rc3' into drm-nextDave Airlie6-285/+106
2021-07-24drm/i915/display: split DISPLAY_VER 9 and 10 in intel_setup_outputs()Lucas De Marchi1-1/+7
2021-07-24drm/i915: fix not reading DSC disable fuse in GLKLucas De Marchi1-4/+5
2021-07-24drm/i915/xehp: Xe_HP forcewake supportMatt Roper4-54/+302
2021-07-24drm/i915/xehp: Extra media engines - Part 3 (reset)John Harrison2-0/+14
2021-07-24drm/i915/xehp: Extra media engines - Part 2 (interrupts)John Harrison2-1/+15
2021-07-24drm/i915/xehp: Extra media engines - Part 1 (engine definitions)John Harrison7-13/+71
2021-07-23drm/i915: Program chicken bit during DP MST sequence on TGL+Matt Roper3-16/+21
2021-07-23drm/i915/bios: Fix ports maskRodrigo Vivi1-1/+2
2021-07-23drm/i915/dg2: Add DG2 to the PSR2 defeature listJosé Roberto de Souza1-1/+2
2021-07-23drm/i915/dg2: Classify DG2 PHY typesMatt Roper2-1/+26
2021-07-23drm/i915/xehp: Define multicast register rangesMatt Roper1-1/+19
2021-07-23drm/i915: Extend Wa_1406941453 to adl-pJosé Roberto de Souza1-2/+2
2021-07-23drm/i915/uapi: reject set_domain for discreteMatthew Auld1-0/+3
2021-07-22drm/i915/xehp: VDBOX/VEBOX fusing registers are enable-basedTvrtko Ursulin1-1/+8
2021-07-23Merge tag 'drm-misc-next-2021-07-22' of git://anongit.freedesktop.org/drm/drm-misc into drm-nextDave Airlie1-4/+5
2021-07-22drm/i915/gt: rename legacy engine->hw_id to engine->gen6_hw_idLucas De Marchi3-8/+8
2021-07-22drm/i915/gt: nuke unused legacy engine hw_idLucas De Marchi2-8/+0
2021-07-22drm/i915/gt: fix platform prefixLucas De Marchi1-2/+2
2021-07-22drm/i915/firmware: Update to DMC v2.03 on RKLAnusha Srivatsa1-2/+2
2021-07-22drm/i915/firmware: Update to DMC v2.12 on TGLAnusha Srivatsa1-2/+2
2021-07-22drm/i915/dmc: Change intel_get_stepping_info()Anusha Srivatsa1-42/+8
2021-07-22drm/i915/step: Add macro magic for handling stepsAnusha Srivatsa2-15/+37
2021-07-22drm/i915: Add intel_context tracingMatthew Brost3-0/+165
2021-07-22drm/i915/guc: Add trace point for GuC submitMatthew Brost2-4/+22
2021-07-22drm/i915/guc: Update GuC debugfs to support new GuCMatthew Brost5-1/+107
2021-07-22drm/i915/guc: Update intel_gt_wait_for_idle to work with GuCMatthew Brost13-28/+134
2021-07-22drm/i915/guc: Ensure G2H response has space in bufferMatthew Brost5-26/+104
2021-07-22drm/i915/guc: Disable semaphores when using GuC schedulingMatthew Brost1-2/+4
2021-07-22drm/i915/guc: Ensure request ordering via completion fencesMatthew Brost1-2/+8
2021-07-22drm/i915: Disable preempt busywait when using GuC schedulingMatthew Brost1-2/+4
2021-07-22drm/i915/guc: Extend deregistration fence to schedule disableMatthew Brost1-7/+33
2021-07-22drm/i915/guc: Disable engine barriers with GuC during unpinMatthew Brost2-1/+11
2021-07-22drm/i915/guc: Defer context unpin until scheduling is disabledMatthew Brost6-4/+180
2021-07-22drm/i915/guc: Insert fence on context when deregisteringMatthew Brost4-2/+63
2021-07-22drm/i915/guc: Implement GuC context operations for new intefaceMatthew Brost8-55/+696
2021-07-22drm/i915/guc: Add bypass tasklet submission path to GuCMatthew Brost1-8/+29
2021-07-22drm/i915/guc: Implement GuC submission taskletMatthew Brost3-117/+127
2021-07-22drm/i915/guc: Add LRC descriptor context lookup arrayMatthew Brost2-2/+35
2021-07-22drm/i915/guc: Remove GuC stage descriptor, add LRC descriptorMatthew Brost3-116/+25
2021-07-22drm/i915/guc: Add new GuC interface defines and structuresMatthew Brost2-0/+56
2021-07-22drm/i915/xehp: New engine context offsetsPrathap Kumar Valsan1-6/+59
2021-07-22drm/i915/xehp: Handle new device context ID formatStuart Summers5-21/+97
2021-07-22drm/i915/selftests: Allow for larger engine countsJohn Harrison2-13/+29
2021-07-22drm/i915/gen12: Use fuse info to enable SFCVenkata Sandeep Dhanalakota1-6/+24
2021-07-22Merge branch 'topic/xehp-dg2-definitions-2021-07-21' into drm-intel-gt-nextMatt Roper6-4/+147
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