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path: root/drivers/gpu/drm/nouveau/core/engine/device/nve0.c (follow)
AgeCommit message (Expand)AuthorFilesLines
2013-11-08drm/nouveau/fb: implement various bits of work towards memory reclockingBen Skeggs1-5/+5
2013-11-08drm/nouveau/clk: implement power state and engine clock control in coreBen Skeggs1-5/+5
2013-11-08drm/nouveau/volt: implement voltage control in coreBen Skeggs1-0/+6
2013-11-08drm/nouveau/perfmon: initial infrastructure to expose performance countersBen Skeggs1-0/+5
2013-11-08drm/nouveau/bus: make external class definitions pointersBen Skeggs1-5/+5
2013-11-08drm/nouveau/pwr: initial implementationBen Skeggs1-0/+6
2013-11-08drm/nouveau/fifo: make external class definitions into pointersBen Skeggs1-5/+5
2013-11-08drm/nouveau/device: recognise GK208Ben Skeggs1-0/+34
2013-11-08drm/nouveau/fb: make external class definitions pointersBen Skeggs1-4/+4
2013-11-08drm/nvc0,nvc4/mc: handle 0xc0's "special" msi rearmBen Skeggs1-4/+4
2013-11-08drm/nouveau/mc: store static data in nouveau_mc class definitionBen Skeggs1-4/+4
2013-11-08drm/nouveau/sw: prepare for the sharing of constructors between implementationsBen Skeggs1-4/+4
2013-07-05drm/nvf0/gr: magic sequence that makes PGRAPH come out of hidingBen Skeggs1-2/+0
2013-07-05drm/nvf0/ce: enable supportBen Skeggs1-1/+1
2013-07-05drm/nvf0/fifo: enable supportBen Skeggs1-1/+1
2013-07-05drm/nvc0-/gr: make register lists from initvals functionsBen Skeggs1-4/+4
2013-07-01drm/nouveau/devinit: move simple pll setting routines to devinitBen Skeggs1-4/+4
2013-07-01drm/nve0/ce: create engine object for ce2Ben Skeggs1-0/+3
2013-05-03drm/nouveau: fix build with nv50->nvc0Dave Airlie1-1/+1
2013-05-02drm/nve0: recognise nvf0 as a kepler board (GK110)Ben Skeggs1-0/+34
2013-04-26drm/nouveau/device: convert to engine, rather than subdevBen Skeggs1-0/+150
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