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path: root/drivers/gpu/drm/nouveau/core/engine/device (follow)
AgeCommit message (Expand)AuthorFilesLines
2014-01-23drm/nv50-/devinit: prevent use of engines marked as disabled by hw/vbiosIlia Mirkin1-10/+10
2014-01-23drm/nouveau/devinit: tidy up the subdev class definitionBen Skeggs8-63/+63
2014-01-23drm/nouveau/instmem: tidy up the subdev class definitionBen Skeggs8-63/+63
2014-01-23drm/nv108/gr: initial support (need external fuc)Ben Skeggs1-3/+1
2014-01-23drm/nv108/ce: enable copy enginesBen Skeggs1-1/+1
2014-01-23drm/nv108/fifo: initial supportBen Skeggs1-1/+1
2014-01-07drm/nvce/mc: fix msi rearm on GF114Sid Boyce1-1/+1
2014-01-07drm/nouveau: populate master subdev pointer only when fully constructedBen Skeggs1-0/+2
2013-12-03drm/nouveau/clk: Add support for NVAA/NVACRoy Spliet1-2/+2
2013-11-14drm/nvc8/mc: msi rearm is via the nvc0 methodBen Skeggs1-1/+1
2013-11-08drm/nouveau/fb: implement various bits of work towards memory reclockingBen Skeggs1-5/+5
2013-11-08drm/nouveau/device: initial control object class, with pstate control methodsBen Skeggs3-2/+155
2013-11-08drm/nouveau/clk: implement power state and engine clock control in coreBen Skeggs2-15/+15
2013-11-08drm/nouveau/volt: implement voltage control in coreBen Skeggs4-0/+47
2013-11-08drm/nouveau/perfmon: initial infrastructure to expose performance countersBen Skeggs5-1/+50
2013-11-08drm/nouveau/bus: add interfaces/helpers for sequencerBen Skeggs1-10/+10
2013-11-08drm/nouveau/bus: make external class definitions pointersBen Skeggs8-63/+63
2013-11-08drm/nouveau/pwr: initial implementationBen Skeggs4-0/+21
2013-11-08drm/nouveau/fifo: make external class definitions into pointersBen Skeggs8-62/+62
2013-11-08drm/nouveau/device: recognise GK208Ben Skeggs2-13/+48
2013-11-08drm/nv50-nvaf/fb: split the class definitions up a bitBen Skeggs1-13/+13
2013-11-08drm/nouveau/fb: make external class definitions pointersBen Skeggs8-62/+62
2013-11-08drm/nv50-nv86,nv92/mc: rearm msi via pci config space, rather than mmio mirrorBen Skeggs1-2/+2
2013-11-08drm/nvc0,nvc4/mc: handle 0xc0's "special" msi rearmBen Skeggs3-19/+19
2013-11-08drm/nouveau/mc: store static data in nouveau_mc class definitionBen Skeggs8-62/+62
2013-11-08drm/nouveau/device: use an additional bit from NV_PMC_BOOT_0 to identify chipsetBen Skeggs1-3/+3
2013-11-08drm/nv44/mpeg: create a copy of the nv31/nv40 implsIlia Mirkin1-12/+12
2013-11-08drm/nv10: fix chipset checks, mostly for the benefit of nv1aIlia Mirkin1-1/+1
2013-11-08drm/nv10: introduce a new NV_11 card typeIlia Mirkin1-2/+9
2013-11-08drm/nouveau/vic: rename PUNK1C1 to PVICBen Skeggs1-1/+1
2013-11-08drm/nouveau/sw: prepare for the sharing of constructors between implementationsBen Skeggs8-61/+61
2013-07-05drm/nvd7/devinit: use fermi class, not teslaBen Skeggs1-1/+1
2013-07-05drm/nvf0/gr: magic sequence that makes PGRAPH come out of hidingBen Skeggs1-2/+0
2013-07-05drm/nvf0/ce: enable supportBen Skeggs1-1/+1
2013-07-05drm/nvf0/fifo: enable supportBen Skeggs1-1/+1
2013-07-05drm/nvd7/gr: initial supportMaarten Lankhorst1-1/+1
2013-07-05drm/nvc0-/gr: make register lists from initvals functionsBen Skeggs2-13/+13
2013-07-01drm/nouveau/vdec: fork vp3 implementations from vp2Ilia Mirkin1-14/+14
2013-07-01drm/nouveau/devinit: move simple pll setting routines to devinitBen Skeggs3-16/+16
2013-07-01drm/nve0/ce: create engine object for ce2Ben Skeggs1-0/+3
2013-05-20drm/nvc0/ce: disable ce1 on a number of chipsetsBen Skeggs1-2/+0
2013-05-20drm/nouveau: fix build with nv50->nvc0Dave Airlie1-1/+1
2013-05-02drm/nve0: recognise nvf0 as a kepler board (GK110)Ben Skeggs2-1/+36
2013-04-26drm/nouveau/device: tweak the device/subdev relationship a littleBen Skeggs1-86/+69
2013-04-26drm/nouveau/device: enable proper constructor/destructorBen Skeggs1-1/+16
2013-04-26drm/nouveau/device: have engine object initialised before creationBen Skeggs1-1/+2
2013-04-26drm/nouveau/device: convert to engine, rather than subdevBen Skeggs9-0/+2344
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