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path: root/drivers/gpu/drm/nouveau/core/engine/graph/fuc (follow)
AgeCommit message (Expand)AuthorFilesLines
2015-01-22drm/nouveau: remove symlinks, move core/ to nvkm/ (no code changes)Ben Skeggs29-11239/+0
2014-06-17drm/gf100-/gr: report class data to host on fwmthd failureBen Skeggs10-694/+969
2014-03-26drm/gm107/gr: initial supportBen Skeggs4-0/+1471
2014-03-26drm/gf100-/gf: fix a stupid typo, waiting on wrong signal for mmctxBen Skeggs11-11/+11
2014-03-26drm/nvc0-/graph: fix gpccs fuc stack setupBen Skeggs7-935/+941
2014-01-23drm/nvc0-/gr: handle fwmthd interrupts in ucodeBen Skeggs7-294/+308
2014-01-23drm/nvc0-/gr: fiddle some magic around strand initBen Skeggs7-1110/+1191
2014-01-23drm/nv108/gr: initial support (need external fuc)Ben Skeggs4-0/+1406
2014-01-23drm/nvc0-/gr: bring in some macros to abstract falcon isa differencesBen Skeggs12-3943/+4431
2013-07-08drm/nvc0/gr: fix gpc firmware regressionMaarten Lankhorst2-20/+23
2013-07-05drm/nvf0-/gr: ctxsw scratch reg count got bumped to 16Ben Skeggs12-3034/+3303
2013-07-05drm/nvc0-/gr: remove hardcoding of UNK count/mask in GPCCS ucodeBen Skeggs4-95/+129
2013-07-05drm/nvf0/gr: build cs ucode for GK110Ben Skeggs5-0/+1409
2013-07-05drm/nvd7/gr: initial supportMaarten Lankhorst11-12/+1431
2013-07-05drm/nvc0-/gr: generate cs register lists from grctx dataBen Skeggs10-2072/+1105
2013-07-05drm/nve0-/gr: some new gpc registers can have multiple copiesBen Skeggs4-180/+227
2013-07-01drm/gr/nvc0-: merge nvc0/nve0 ucode, and use cpp instead of m4Ben Skeggs14-2587/+1270
2013-07-01drm/nvc0/gr: cleanup register lists, and add nvce/nvcf to switchesBen Skeggs4-500/+99
2013-07-01drm/nvc8/gr: update initial register/context valuesBen Skeggs4-9/+9
2013-07-01drm/nvc4/gr: update initial register/context valuesBen Skeggs4-9/+9
2013-07-01drm/nvc1/gr: update initial register/context valuesBen Skeggs4-34/+34
2013-07-01drm/nvc3/gr: update initial register/context valuesBen Skeggs4-12/+61
2013-07-01drm/nvc0/gr: update initial register/context valuesBen Skeggs4-498/+774
2013-07-01drm/nvd9/gr: update initial register/context valuesBen Skeggs4-4/+4
2013-07-01drm/nve4/gr: update initial register/context valuesBen Skeggs2-52/+11
2013-07-01drm/nvf0/gr: initial register/context setupBen Skeggs4-439/+726
2013-07-01drm/nve7/gr: update initial register/context valuesBen Skeggs2-3/+3
2013-07-01drm/nve6/gr: update initial register/context valuesBen Skeggs2-3/+46
2013-07-01drm/nouveau: pull in latest ucode builds from external treeBen Skeggs2-42/+45
2013-04-26drm/nve0: magic up some support for GF117Ben Skeggs2-0/+8
2012-12-23drm/nve0/graph: fix fuc, and enable acceleration on all known chipsetsBen Skeggs4-85/+107
2012-12-23drm/nvc0/graph: fix fuc, and enable acceleration on GF119Ben Skeggs2-73/+84
2012-10-03drm/nvc0/gr: rebuild fuc with latest envyasBen Skeggs4-12/+167
2012-10-03drm/nve0/gr: remove 0x404160 bashing from hub fucBen Skeggs2-282/+189
2012-10-03drm/nve0/gr: initial fuc implementation, based on fermi's codeBen Skeggs5-0/+3111
2012-10-03drm/nouveau: quiet some static-related sparse noiseMarcin Slusarz2-4/+4
2012-10-03drm/nouveau: restructure source tree, split core from drm implementationBen Skeggs5-0/+3171
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