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path: root/drivers/gpu/drm/nouveau/nouveau_pm.h (follow)
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2013-11-08drm/nouveau/drm/pm: remove everything except the hwmon interfaces to THERMBen Skeggs1-283/+0
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-10-03drm/nouveau/therm: move thermal-related functions to the therm subdevMartin Peres1-19/+0
It looks scary because of the size, but I tried to keep the differences minimal. Further patches will fix the actual "driver" code and add new features. v2: change filenames, split to submodules v3: add a missing include v4: Ben Skeggs <bskeggs@redhat.com> - fixed set_defaults() to allow min_duty < 30 (thermal table will override this if it's actually necessary) - fixed set_defaults() to not provide pwm_freq so nv4x (which only has pwm_div) can actually work. the boards using pwm_freq will have a thermal table entry to provide us the value. - removed unused files Signed-off-by: Martin Peres <martin.peres@labri.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-10-03drm/nouveau/therm: rework thermal table parsingMartin Peres1-1/+0
As an accident, it should also fix temperature reading on nv4x. v2: introduce nvbios_therm_entry as advised by darktama Signed-off-by: Martin Peres <martin.peres@labri.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-10-03drm/nouveau: port remainder of drm code, and rip out compat layerBen Skeggs1-0/+194
v2: Ben Skeggs <bskeggs@redhat.com> - fill in nouveau_pm.dev to prevent oops - fix ppc issues (build + OF shadow) Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-05-24drm/nva3/pm: initial attempt at more magic PFB regsBen Skeggs1-1/+3
The reg calculation may get moved elsewhere at some point, but lets figure out what exactly we need to do first. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-03-13drm/nouveau/pm: rework to allow selecting separate profiles for ac/batteryBen Skeggs1-0/+2
Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Signed-off-by: Martin Peres <martin.peres@labri.fr>
2012-03-13drm/nouveau/pm: detect when we need dll disabled for gddr3Ben Skeggs1-0/+1
Fixes minor flickering on NVS295 when at perflvl 0. Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Signed-off-by: Martin Peres <martin.peres@labri.fr>
2012-03-13drm/nouveau/pm: introduce ram reclocking helperBen Skeggs1-0/+18
This will probably result in more lines of code, however, we're going to have at least 3 slightly different implementations of this very soon and I'd rather keep the ram reclocking logic separate from the hw specifics. DDR2/DDR3/GDDR3 implemented thus far, others will be added as necessary. Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Signed-off-by: Martin Peres <martin.peres@labri.fr>
2012-03-13drm/nouveau/pm: calculate memory timings at perflvl creation timeBen Skeggs1-0/+1
Statically generating the PFB register and MR values for each timing set turns out to be insufficient. There's at least one (so far) known piece of information which effects MR values which is stored in the perflvl entry on some chipsets (and in another table on later ones), which is disconnected from the timing table entries. After this change we will generate a timing set based on an input clock frequency instead, and have this data stored in the performance level data. Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Signed-off-by: Martin Peres <martin.peres@labri.fr>
2011-12-21drm/nvc0/pm: initial engine reclockingBen Skeggs1-0/+2
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-12-21drm/nouveau: just pass gpio line to pwm_*, not entire gpio structBen Skeggs1-4/+4
We don't need more than the line id to determine the PWM controller, and the GPIO interfaces are about to change somewhat. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-12-21drm/nv04-nv30/pm: port to newer interfacesBen Skeggs1-4/+3
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-12-21drm/nv50/pm: rewrite clock management, and switch to the new pm hooksBen Skeggs1-4/+3
This area is horrifically complicated on these chipsets, and it's likely we will need at least a few more tweaks yet. Oh yes, and it's completely disabled on IGPs for the moment. From traces, things look potentially different there yet again. Sigh... Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-12-21drm/nouveau/pm: make clocks_set return an error code clocks_set can fail.Martin Peres1-2/+2
Reporting an error is better than silently refusing to reclock. V2: Use the same logic on nv40 Signed-off-by: Martin Peres <martin.peres@labri.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-12-21drm/nv40/pm: convert to new pwm hooks, also fixing pwm type detectionBen Skeggs1-4/+2
A NV49 appeared a while back that was using the "nv41 style" pwm registers, rather than the "nv40 style" ones my board is using. This disproves the previous theory that the pwm controller choice is chipset-specific. So, after looking at a bunch of vbios images it appears that the next viable theory is that we should select the pwm controller to use based on the gpio line the fan is tied to, just like we do on nv50. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-12-21drm/nv50/pm: convert to new fanspeed pwm controller hooksBen Skeggs1-2/+2
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-12-21drm/nv50/pm: add support for pwm fan controlBen Skeggs1-0/+2
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-12-21drm/nv41/pm: implement a second type of fanspeed pwmBen Skeggs1-0/+2
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-12-21drm/nv40/pm: implement first type of pwm fanspeed funcsBen Skeggs1-0/+2
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20drm/nv40/pm: write nv40-specific reclocking routinesBen Skeggs1-0/+5
Not 100% perfect yet, but a good start towards what it'll look like in the end. Actually seems stable on a NV44 I have here, as much as running around OA for a fair amount of time constantly switching between performance levels can prove.. My NV49 isn't quite so happy, and semaphores mess up somehow (sometimes) as a result of the memory reclocking. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20drm/nvc0/pm: initial implementation of clocks_get()Ben Skeggs1-0/+3
Not too certain on memory clock yet, but it gets the right numbers for each perflvl on my NVC0. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20drm/nva3/pm: rewrite clock_set, and switch to new interfacesBen Skeggs1-4/+3
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-10-05drm/nva3: split pm backend out from nv50Ben Skeggs1-0/+6
This will end up quite different, it makes sense for it to be completely separate. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-10-05drm/nouveau: pass perflvl struct to clock_pre()Ben Skeggs1-2/+4
On certain boards, there's BIOS scripts and memory timings that need to be modified with the memclk. Just pass in the entire perflvl struct and let the chipset-specific code decide what to do. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-10-05drm/nouveau: Import initial memory timing workRoy Spliet1-0/+4
This isn't correct everywhere yet, but since we don't use the data yet it's perfectly safe to push in, and the information we gain from logs will help to fix the remaining issues. v2 (Ben Skeggs <bskeggs@redhat.com>): - fixed up formatting - free parsed timing info on takedown - switched timing table printout to debug loglevel Signed-off-by: Roy Spliet <r.spliet@student.tudelft.nl> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-09-24drm/nouveau: Refactor nouveau_temp_get() into engine pointers.Francisco Jerez1-1/+2
Signed-off-by: Francisco Jerez <currojerez@riseup.net> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-09-24drm/nouveau: Add temperature support (vbios parsing, readings, hwmon)Martin Peres1-0/+6
Signed-off-by: Martin Peres <martin.peres@ensi-bourges.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-09-24drm/nouveau: restore perflvl on resume, and restore boot perflvl on unloadBen Skeggs1-0/+1
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-09-24drm/nv04-nv40: import initial pm backendBen Skeggs1-0/+5
Currently just hooked up to the already-existing nouveau_hw, which should handle all relevant chipsets as well as we currently can. This will likely be eventually split out and improved into chipset specific code at a later point. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-09-24drm/nv50: import initial clock get/set routines + hook up pm engineBen Skeggs1-0/+5
This will make nouveau_pm attempt to report the card's current performance level both during bootup, and through sysfs. This is a very initial implementation, and can be improved a *lot* Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-09-24drm/nouveau: import initial work on vbios performance table parsingBen Skeggs1-0/+44
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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