aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/gpu/drm/nouveau/nvkm/subdev
AgeCommit message (Expand)AuthorFilesLines
2015-08-28drm/nouveau/bar: switch to device pri macrosBen Skeggs2-14/+18
2015-08-28drm/nouveau/fifo: cosmetic changesBen Skeggs1-6/+6
2015-08-28drm/nouveau/volt: cosmetic changesBen Skeggs3-43/+37
2015-08-28drm/nouveau/tmr: cosmetic changesBen Skeggs8-104/+103
2015-08-28drm/nouveau/therm: cosmetic changesBen Skeggs14-458/+432
2015-08-28drm/nouveau/pmu: cosmetic changesBen Skeggs2-46/+44
2015-08-28drm/nouveau/mxm: cosmetic changesBen Skeggs1-9/+5
2015-08-28drm/nouveau/mmu: cosmetic changesBen Skeggs6-163/+152
2015-08-28drm/nouveau/mc: cosmetic changesBen Skeggs7-72/+66
2015-08-28drm/nouveau/ltc: cosmetic changesBen Skeggs4-147/+147
2015-08-28drm/nouveau/imem: cosmetic changesBen Skeggs7-191/+187
2015-08-28drm/nouveau/ibus: cosmetic changesBen Skeggs3-105/+93
2015-08-28drm/nouveau/i2c: cosmetic changesBen Skeggs8-49/+37
2015-08-28drm/nouveau/gpio: cosmetic changesBen Skeggs1-4/+4
2015-08-28drm/nouveau/fuse: cosmetic changesBen Skeggs4-42/+33
2015-08-28drm/nouveau/fb: cosmetic changesBen Skeggs39-623/+609
2015-08-28drm/nouveau/devinit: cosmetic changesBen Skeggs15-203/+203
2015-08-28drm/nouveau/clk: cosmetic changesBen Skeggs11-769/+758
2015-08-28drm/nouveau/bus: cosmetic changesBen Skeggs8-96/+90
2015-08-28drm/nouveau/bios: cosmetic changesBen Skeggs2-4/+4
2015-08-28drm/nouveau/bar: cosmetic changesBen Skeggs4-134/+126
2015-08-28drm/nouveau/device: include core/device.h automatically for subdevs/enginesBen Skeggs51-70/+0
2015-08-28drm/nouveau/subdev: add direct pointer to nvkm_deviceBen Skeggs2-4/+4
2015-08-28drm/nouveau/pmu/gk104: implement a hackish workaround for a hw bugBen Skeggs1-0/+51
2015-08-28drm/nouveau/disp/dp: fix some tx_pu mishandlingBen Skeggs1-1/+1
2015-08-28drm/nouveau/bios/dp: use alternate set of drvctl values where necessaryBen Skeggs1-5/+4
2015-08-28drm/nouveau/bios/dcb: accept "maxwell" lane count values for dcb 4.0Ben Skeggs1-14/+13
2015-08-28drm/nouveau/fb/sddr3: add WR/CWL values seen on a GK208Ilia Mirkin1-2/+2
2015-08-28drm/nouveau/bios: add opcodes 0x73 and 0x77Ilia Mirkin1-0/+37
2015-08-28drm/nouveau/drm/nouveau/clk: fix tstate to pstate calculationWei Ni1-1/+1
2015-08-28drm/nouveau/clk/nv50: Enable user reclocking for NVA0Roy Spliet1-1/+2
2015-08-28drm/nouveau/fb/gddr3: Add a few CL and WR entries observed on GTX260Roy Spliet1-4/+4
2015-08-28drm/nouveau/fb/ramnv50: GDDR3 script for NVA0Roy Spliet1-25/+104
2015-08-28drm/nouveau/bios/ramcfg: Separate out RON pull valueRoy Spliet3-3/+8
2015-08-28drm/nouveau/bios/rammap: Parse perf mode as if it's a rammap entryRoy Spliet2-0/+17
2015-08-28drm/nouveau/fb/ramnv50: Ressurect timing code, use proper timing/rammap handlersRoy Spliet2-33/+164
2015-08-28drm/nouveau/fb/ramgt215: No need to cuss like thatRoy Spliet1-1/+1
2015-08-28drm/nouveau/fb/ramnv50: Make 0x100da0 per-partitionRoy Spliet1-7/+13
2015-08-28drm/nouveau/bios/rammap: Pull DLLoff bit out of version 0x10 structRoy Spliet5-7/+7
2015-07-27drm/nouveau/bios: add proper support for opcode 0x59Ilia Mirkin1-4/+20
2015-07-27drm/nouveau/bios: add 0x59 and 0x5a opcodesIlia Mirkin1-0/+24
2015-07-27drm/nouveau/ibus/gk20a: increase SM wait timeoutAlexandre Courbot1-0/+8
2015-07-27drm/nouveau/clk/gt215: u32->s32 for difference in req. and set clockRoy Spliet1-1/+2
2015-07-27drm/nouveau/drm/nv04-nv40/instmem: protect access to priv->heap by mutexKamil Dudka1-0/+8
2015-05-29drm/nouveau/devinit/gm100-: force devinit table execution on boards without PDISPBen Skeggs4-3/+6
2015-05-29drm/nouveau/devinit/gf100: make the force-post condition more obviousBen Skeggs1-1/+4
2015-04-14drm/nouveau/bios: fix fetching from acpi on certain systemsJan Vesely1-2/+2
2015-04-14drm/nouveau/pmu/gk20a: add some missing staticsAlexandre Courbot1-3/+4
2015-04-14drm/nouveau/pmu/gk208: implement gr power-up magic with gk110_pmu_pgob()Ben Skeggs3-1/+4
2015-04-14drm/nouveau/pmu/gk110: implement gr power-up magic like PGOB on earlier chipsBen Skeggs2-0/+96
Copyright © 1996 – 2026 Jason A. Donenfeld. All Rights Reverse Engineered.