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path: root/drivers/gpu/drm/vc4
AgeCommit message (Expand)AuthorFilesLines
2020-09-07drm/vc4: crtc: Add BCM2711 pixelvalvesMaxime Ripard2-2/+100
2020-09-07drm/vc4: drv: Disable the CRTC at boot timeMaxime Ripard3-0/+30
2020-09-07drm/vc4: crtc: Move the CRTC disable outMaxime Ripard1-12/+22
2020-09-07drm/vc4: hvs: Introduce a function to get the assigned FIFOMaxime Ripard2-0/+55
2020-09-07drm/vc4: hvs: Make the stop_channel function publicMaxime Ripard2-1/+2
2020-09-07drm/vc4: crtc: Clear the PixelValve FIFO during configurationMaxime Ripard1-1/+1
2020-09-07drm/vc4: crtc: Clear the PixelValve FIFO on disableMaxime Ripard1-2/+1
2020-09-07drm/vc4: crtc: Add a delay after disabling the PixelValve outputMaxime Ripard1-0/+18
2020-09-07drm/vc4: encoder: Add finer-grained encoder callbacksMaxime Ripard2-0/+26
2020-09-07drm/vc4: crtc: Move HVS channel init before the PV initialisationMaxime Ripard1-4/+4
2020-09-07drm/vc4: crtc: Remove redundant pixelvalve resetMaxime Ripard1-1/+0
2020-09-07drm/vc4: crtc: Remove mode_set_nofbMaxime Ripard1-6/+1
2020-09-07drm/vc4: hvs: Make sure our channel is resetMaxime Ripard1-0/+4
2020-09-07drm/vc4: crtc: Move the HVS gamma LUT setup to our init functionMaxime Ripard4-47/+16
2020-09-07drm/vc4: crtc: Move HVS init and close to a functionMaxime Ripard1-46/+58
2020-09-07drm/vc4: crtc: Move PV dump to config_pvMaxime Ripard1-14/+12
2020-09-07drm/vc4: crtc: Turn pixelvalve reset into a functionMaxime Ripard1-7/+13
2020-09-07drm/vc4: crtc: Disable color management for HVS5Maxime Ripard2-7/+12
2020-09-07drm/vc4: crtc: Add HDMI1 encoder typeMaxime Ripard1-0/+1
2020-09-07drm/vc4: crtc: Rename HDMI encoder type to HDMI0Maxime Ripard3-3/+3
2020-09-07drm/vc4: crtc: Add function to compute FIFO level bitsMaxime Ripard1-2/+10
2020-09-07drm/vc4: crtc: Add FIFO depth to vc4_crtc_dataMaxime Ripard2-3/+20
2020-09-07drm/vc4: crtc: Assign output to channel automaticallyMaxime Ripard6-26/+200
2020-09-07drm/vc4: kms: Convert to for_each_new_crtc_stateMaxime Ripard1-4/+6
2020-09-07drm/vc4: crtc: Enable and disable the PV in atomic_enable / disableMaxime Ripard1-3/+7
2020-09-07drm/vc4: crtc: Use local chan variableMaxime Ripard1-1/+1
2020-09-07drm/vc4: crtc: Rename HVS channel to outputMaxime Ripard4-8/+8
2020-09-07drm/vc4: crtc: Move the cob allocation outside of bindMaxime Ripard2-20/+17
2020-09-07drm/vc4: crtc: Use a shared interruptMaxime Ripard1-1/+3
2020-09-07drm/vc4: crtc: Deal with different number of pixel per clockMaxime Ripard2-7/+14
2020-09-07drm/vc4: plane: Create more planesMaxime Ripard1-1/+1
2020-09-07drm/vc4: plane: Optimize the LBM allocation sizeDave Stevenson1-4/+13
2020-09-07drm/vc4: plane: Change LBM alignment constraint on LBMDave Stevenson1-1/+3
2020-09-07drm/vc4: hvs: Boost the core clock during modesetMaxime Ripard3-0/+29
2020-09-07drm/vc4: Add support for the BCM2711 HVS5Dave Stevenson4-59/+240
2020-07-07drm/vc4: crtc: Remove the feed_txp testsMaxime Ripard1-22/+7
2020-07-07drm/vc4: txp: Turn the TXP into a CRTC of its ownMaxime Ripard2-20/+99
2020-07-07drm/vc4: crtc: Move the txp_armed function to the TXPMaxime Ripard3-9/+8
2020-07-07drm/vc4: crtc: Move the CRTC initialisation to a separate functionMaxime Ripard2-37/+53
2020-07-07drm/vc4: crtc: Only access the PixelValve registers if we have toMaxime Ripard1-4/+15
2020-07-07drm/vc4: crtc: Split CRTC data in twoMaxime Ripard2-11/+37
2020-07-07drm/vc4: crtc: Make state functions publicMaxime Ripard2-11/+20
2020-07-07drm/vc4: crtc: Move HVS setup code to the HVS driverMaxime Ripard3-251/+302
2020-07-07drm/vc4: Reorder the bind order of the devicesMaxime Ripard1-1/+1
2020-07-07drm/vc4: Convert register accessors to FIELD_*Maxime Ripard1-5/+4
2020-07-02drm/vc4: Use __drm_atomic_helper_crtc_resetDaniel Vetter1-2/+1
2020-06-10drm/vc4: crtc: Restrict HACT_ACT setup to DSIMaxime Ripard1-1/+2
2020-06-10drm/vc4: crtc: Turn static const variable into a defineMaxime Ripard1-3/+4
2020-06-10drm/vc4: crtc: Move crtc state to common headerMaxime Ripard2-21/+21
2020-06-10drm/vc4: crtc: Switch to of_device_get_match_dataMaxime Ripard1-5/+5
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