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2009-10-26drm/radeon/r600: Replace repeated calculations with variable.Robert Noland1-21/+31
- Reduce the chance of error and avoid a bit of overhead. - Use switch to assign color and format Signed-off-by: Robert Noland <rnoland@2hip.net> Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-10-26drm/radeon/kms/atom: get better min pixel clock infoMathias Fröhlich1-2/+6
Where supported use ulMinPixelClockPLL_Output rather than usMinPixelClockPLL_Output for pll_out_min. This seems to improve pll selection on some boards. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-10-26drm/radeon/kms: add quirk for acer 5102Alex Deucher1-10/+23
doesn't have a tv-out port Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-10-26drm/radeon/kms: fix vram_width calculation on r6xx/r7xxAlex Deucher4-16/+52
Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-10-26drm/radeon/kms: fix cs parser tex bit 11 checkMathias Fröhlich1-2/+7
The problem boils down to the order when the bit11 of the texture size is or'ed to the original width. In the end each mipmap level has the same width or height because of that 11 bit is ored to the scaled down lod with and thus blows up the size again to the full size or more due to the power of two rounding afterwards. The attached patch changes this order so that the texture sizes are computed correct. Also the on error the yet missing inputs to the size computation are printed which helped me to find out where it really breaks. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-10-26drm/kms: fix kms/fbdev colormap support properly.Dave Airlie1-13/+29
This sets the fbcon to use TRUECOLOR by default, it then only modifies the pseudo palette for fbcon, and only touches the real palette when in 8-bit pseudo color mode. Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-10-23drm/i915: Ironlake suspend/resume supportZhenyu Wang2-55/+256
This adds registers save/restore for Ironlake to make suspend work. Signed-off-by: Guo, Chaohong <chaohong.guo@intel.com> [zhenyuw: some code re-orgnization, and add more save/restore for FDI link and transcoder registers, also fix palette register for Ironlake] Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
2009-10-23drm/i915: kill warning in intel_find_pll_g4x_dpJesse Barnes1-0/+1
Initialize clock.vco to silence gcc. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Eric Anholt <eric@anholt.net>
2009-10-23drm/i915: update watermarks before enabling PLLsJesse Barnes1-1/+2
When coming back from DPMS or turning on a display, make sure we have the watermarks set up before turning on the display plane, otherwise we may get underruns. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Tested-by: Dirk Hohndel <hohndel@infradead.org> Signed-off-by: Eric Anholt <eric@anholt.net>
2009-10-23drm/i915: add FIFO watermark support for G4xJesse Barnes2-8/+84
Turns out G4x needs to have sensible watermarks set, especially for self-refresh enabled modes. Add support for it. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Tested-by: Dirk Hohndel <hohndel@infradead.org> Signed-off-by: Eric Anholt <eric@anholt.net>
2009-10-19drm/i915: quiet DP i2c initZhenyu Wang1-1/+1
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
2009-10-19drm/i915: fix panel fitting filter coefficient select for IronlakeZhenyu Wang2-1/+6
Must set filter selection as hardcoded coefficients for medium 3x3 filtering, which matches vbios setting for Ironlake. This fixes display corrupt issue on HP arrandale with new vbios. Cc: Stable Team <stable@kernel.org> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
2009-10-19drm/i915: fix to setup display reference clock control on IronlakeZhenyu Wang2-2/+42
For new stepping of PCH, the display reference clock is fully under driver's control. This one trys to setup all needed reference clock for different outputs. Older stepping of PCH chipset should be ignoring this. This fixes output failure issue on newer PCH which requires driver to take control of reference clock enabling. Cc: Stable Team <stable@kernel.org> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
2009-10-16drm/radeon/kms: fix support for original r100Alex Deucher1-2/+19
Original radeon didn't have a connector table in the bios. Check for the CRT table and if we have one, add a VGA connector. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@linux.ie>
2009-10-16drm/radeon/kms: fix legacy quirk handlingAlex Deucher1-2/+3
Need to check the return type for the quirk function to decide whether we add the connectors and encoders. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@linux.ie>
2009-10-16drm: Add the basic check for the detailed timing in EDIDZhao Yakui1-0/+15
Sometimes we will get the incorrect display modeline when parsing the detailed timing in EDID. For example: >hsync/vsync width is zero >sync is beyond the blank. So add the basic check for the detailed timing in EDID to avoid the incorrect display modeline. Signed-off-by: Zhao Yakui <yakui.zhao@intel.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-10-16drm/radeon/kms: use RADEON_GPU_PAGE_SIZE instead of 4096Matt Turner7-22/+24
Signed-off-by: Matt Turner <mattst88@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-10-16drm/radeon/kms: limit default tv modes to <= 1024x768Alex Deucher1-0/+5
fixes fdo bug 24496 Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-10-16drm/radeon/kms/atom: fix tv-outAlex Deucher2-7/+6
D1MODE_INTERLEAVE_EN was getting set in some cases in the encoder quirks function due to the changes in 5a9bcacc0a56f0d9577494e834519480018a6cc3 Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-10-16drm/radeon/kms: fix connector edid handlingAlex Deucher4-32/+73
Based partly on a patch from Christian Koenig <deathsimple@vodafone.de> - fix several memory leaks in radeon_connector->edid handling - store edid in radeon_connector->edid in detect() or get_modes() - switch hdmi detect code to use radeon_connector->edid - add support for oem boards multiple connectors that share a ddc line. - short circuit lvds_detect() if have a stored edid Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-10-15drm/i915: Install a fence register for fbc on g4xChris Wilson1-3/+5
To enable framebuffer compression on a g4x, we not only need the buffer to tiled (X only), we also need to hold a fence register for the buffer. Currently we only install a fence register for pre-i965s when setting up the scanout buffer. Rather than adding some convoluted logic to g4x_enable_fbc() to acquire a fence register, and perhaps to g4x_disable_fbc() to release it again, we can extend the acquisition during setup to all chipsets. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Eric Anholt <eric@anholt.net>
2009-10-15drm/i915: save/restore BLC histogram control reg across suspend/resumeJesse Barnes3-0/+5
Turns out some machines, like the ThinkPad X40 don't come back if you don't save/restore this register. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Eric Anholt <eric@anholt.net>
2009-10-15drm/radeon/kms: fix internal tmds setup on legacy display engineAlex Deucher2-1/+12
- crtc 0 routing was wrong - need to clear various timing bits in FP_GEN_CNTL - need to set FP_H/V2_SYNC_STRT_WID regs for crtc 1 Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-10-15drm/radeon/kms: move active_device setup into encoder fixup()Alex Deucher2-22/+14
radeon_encoder->active_device defines the active routing between the encoder and connector. The encoder fixup and dpms functions need to know the active_device to function properly. Setting active_device in the prepare hook was too late in some cases. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-10-13drm/i915: Fix FDI M/N setting according with correct color depthZhenyu Wang2-4/+32
FDI M/N calculation hasn't taken the current pipe color depth into account, but always set as 24bpp. This one checks current pipe color depth setting, and change FDI M/N calculation a little to use bits_per_pixel first, then convert to bytes_per_pixel later. This fixes display corrupt issue on Arrandle LVDS with 1600x900 panel in 18bpp dual-channel mode. Cc: Stable Team <stable@kernel.org> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
2009-10-13drm/i915: disable powersave feature for Ironlake currentlyZhenyu Wang2-3/+13
Until we figure out the right setting for powersave features on Ironlake, disable it for now. Also disable watermark update, which has new registers for it on Ironlake too. Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org> [anholt: Resolved against the Pineview FBC changes] Signed-off-by: Eric Anholt <eric@anholt.net>
2009-10-13drm/i915: Fix render reclock availability detection.Andy Lutomirski1-8/+6
If the device didn't support EDP, we would bail out too soon. Signed-off-by: Andy Lutomirski <luto@mit.edu> [anholt: Pulled this patch out of the patch for adding quirks to enable reclocking.] Signed-off-by: Eric Anholt <eric@anholt.net>
2009-10-13drm/i915: Save and restore the GM45 FBC regs on suspend and resume.Jesse Barnes2-8/+19
This hasn't fixed the regressions we were testing against, but clearly should be required. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Eric Anholt <eric@anholt.net>
2009-10-13drm/i915: Set the LVDS_BORDER when using LVDS scaling modeZhao Yakui4-1/+15
According to the spec the LVDS_BORDER_ENABLE bit decides whether the border data should be included in the active display and data sent to the panel. Border should be used when in VGA centered (un-scaled) mode or when scaling a 4:3 source image to a wide screen panel (typical 16:9). So when the LVDS scaling is used, decide whether the LVDS_BORDER should be enabled or not according to the current scaling mode. At the same time fix the typo error in LVDS center scaling mode. https://bugs.freedesktop.org/show_bug.cgi?id=23789 Signed-off-by: Zhao Yakui <yakui.zhao@intel.com> tested-by: Zhao Jian <jian.zhao@intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
2009-10-13drm/i915: disable FBC for Pineview, fixing a boot hang.Shaohua Li2-3/+2
Pineview doesn't have this FBC mechanism, so this code doesn't apply. Signed-off-by: Shaohua Li <shaohua.li@intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
2009-10-13drm/radeon/kms: properly handle mode id with native mode changesAlex Deucher2-2/+3
drm modes are objects with indentifiers. Make sure to preserve the mode id when copying mode params. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-10-12drm/radeon/kms: fix use of index before proper initialisation.Dave Airlie1-1/+1
With the adjust table introduction, we need to fill out index before getting the table version. Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-10-12drm/radeon: Revert "drm/r600: avoid assigning vb twice in blit code"Dave Airlie2-5/+8
This reverts commit 49c458e544ae14514209ed80ea6829ca1b18ddf0. It seems to have some side effects in the non-kms cases. Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-10-12drm/radeon/kms: also check for edid in lvds detectAlex Deucher1-1/+12
In case the system has bad native mode info but valid edid. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-10-12drm/radeon/kms: use drm_mode directly for panel modesAlex Deucher7-159/+97
This reduces the number of mode format conversions needed and makes native panel mode support cleaner. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-10-12drm/radeon/kms/atom: rework crtc modesetAlex Deucher3-184/+148
- clean up tv timing handling - unify SetCRTC_Timing and SetCRTC_UsingDTDTiming Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-10-12drm/radeon/kms/atom: add support for AdjustDisplayPllAlex Deucher1-6/+30
DCE3+ has an AdjustDisplayPll that will adjust the pixel clock accordingly based on the encoder/transmitter to handle special hw requirements. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-10-12drm/radeon/kms/atom: reorder crtc dpmsAlex Deucher1-2/+2
Based on recommendation from bios docs. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-10-12drm/radeon/kms: make sure LVDS panel is valid in detect()Alex Deucher1-1/+13
If the panel data is bogus this can lead to problems later when the hardware trys to set the mode. If the data is invalid, report LVDS as disconnected. Should fix fdo bug 24247. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-10-12drm/radeon/kms: Fix apparent typo in legacy CRTC memory bandwidth calculation.Michel Dänzer1-1/+1
While investigating the cause of CRTC FIFO underruns, I noticed that when converting the memory bandwidth calculation from the userspace X driver code, an instance of '8.0' was apparently accidentally converted to '80'. Signed-off-by: Michel Dänzer <daenzer@vmware.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-10-12drm/radeon/kms: Update memory bandwidth requirements in mode_set_base hook.Michel Dänzer2-4/+8
The hook may change the number of bytes per pixel being scanned out, which affects the CRTC memory bandwidth requirements. E.g. booting in 8bpp and then running X in 32bpp would result in the bandwidth requirements being underestimated for the latter and consequently in CRTC FIFO underruns causing visible artifacts with 3D intensive workloads. ATOM changes only compile-tested. Signed-off-by: Michel Dänzer <daenzer@vmware.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-10-12drm/radeon/kms: don't refuse LUT because no framebuffer.Dave Airlie1-4/+0
The fb binding might be happening in a subsequent crtc setup call. gets rid of some lut issues. Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-10-09Merge branch 'drm-intel-next' of git://git.kernel.org/pub/scm/linux/kernel/git/anholt/drm-intelLinus Torvalds8-32/+49
* 'drm-intel-next' of git://git.kernel.org/pub/scm/linux/kernel/git/anholt/drm-intel: drm/i915: Initialize HDMI outputs as HDMI connectors, not DVI. drm/i915: Multiply the refresh by 1000 in TV mode validatiion drm/i915: Enable irq to trace batch buffer completion. drm/i915: batch submit seqno off-by-one. drm/i915: Record device minor rather than pointer in TRACE_EVENT drm/i915: Don't call intel_update_fbc from intel_crtc_cursor_set
2009-10-08Merge branch 'drm-next' of ../drm-next into drm-linusDave Airlie46-1607/+3326
conflict in radeon since new init path merged with vga arb code. Conflicts: drivers/gpu/drm/radeon/radeon.h drivers/gpu/drm/radeon/radeon_asic.h drivers/gpu/drm/radeon/radeon_device.c
2009-10-08drm/radeon/kms: fix vline register for second head.Dave Airlie2-2/+2
Both r100/r600 had this wrong, use the macro to extract the register to relocate. Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-10-08drm/r600: avoid assigning vb twice in blit codeRobert Noland2-8/+5
There is no need to assign vb before you know that space is available. [agd5f: adapted for kernel tree.] Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-10-08drm/radeon: use list_for_each_entry instead of list_for_eachDave Airlie1-13/+4
This is just a cleanup of the list macro usage. Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-10-08drm/radeon/kms: Fix AGP support for R600/RV770 family (v2)Jerome Glisse4-41/+157
For AGP to work unmapped access must cover VRAM & AGP as AGP is treated like VRAM by the GPU (ie physical address). This patch properly setup the virtual memory system aperture to cover AGP if AGP is enabled. It seems that there is memory corruption after resume when using AGP (RV770 seems unaffected thought). Version 2 just fix merge issue with updated AGP fallback patch. Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-10-08drm/radeon/kms: Fallback to non AGP when acceleration fails to initialize (v2)Jerome Glisse3-53/+34
When GPU acceleration is not working with AGP try to fallback to non AGP GART (either PCI or PCIE GART). This should make KMS failure on AGP less painfull. We still need to find out what is wrong when AGP fails but at least user have a lot of more chances to get a working configuration with acceleration. This patch also cleanup R600/RV770 fallback path so they use same code as others asics. Version 2 factorize agp disabling logic to avoid code duplication and bugs. Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-10-08drm/radeon/kms: Fix RS600/RV515/R520/RS690 IRQJerome Glisse2-4/+68
Bad generated header file leaded to use wrong register to check IRQ status and acknowledge them. Fix the header and use proper registers. Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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