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path: root/drivers/gpu
AgeCommit message (Expand)AuthorFilesLines
2020-11-02drm/vc4: Use devm_drm_dev_allocMaxime Ripard5-32/+25
2020-11-02drm/vc4: Use the helper to retrieve vc4_dev when neededMaxime Ripard2-3/+3
2020-11-02drm/vc4: gem: Add a managed action to cleanup the job queueMaxime Ripard3-10/+10
2020-11-02drm/vc4: drv: Use managed drm_mode_config_initMaxime Ripard1-4/+3
2020-11-02drm/vc4: bo: Add a managed action to cleanup the cacheMaxime Ripard3-4/+4
2020-11-02drm/nouveau/ttm: Add limits.hMaxime Ripard1-0/+1
2020-11-02Merge drm/drm-next into drm-misc-nextMaxime Ripard510-5944/+25150
2020-11-01drm/amdgpu: fix build_coefficients() argumentArnd Bergmann1-1/+1
2020-11-01amd/amdgpu: Disable VCN DPG mode for PicassoVeerabadhran Gopalakrishnan1-2/+1
2020-11-01drm/msm: Add missing stub definitionRobin Murphy1-0/+5
2020-11-01drm/msm: Unconditionally call dev_pm_opp_of_remove_table()Viresh Kumar3-16/+7
2020-11-01drm/msm/atomic: Convert to per-CRTC kthread_workRob Clark3-10/+35
2020-11-01drm/msm/kms: Update msm_kms_init/destroyRob Clark5-8/+36
2020-11-01drm/msm/gpu: Convert retire/recover work to kthread_workerRob Clark6-26/+34
2020-11-01drm/msm/atomic: Drop per-CRTC locks in reverse orderRob Clark2-1/+5
2020-11-01drm/msm: Fix race condition in msm driver with async layer updatesKrishna Manikandan2-15/+28
2020-10-30drm/hisilicon: Adding a const declaration to an invariant constructTian Tao2-2/+2
2020-11-02drm/nouveu: fix swiotlb includeChristian König2-1/+3
2020-10-30drm/i915: Reduce severity for fixing up mistaken VBT tc->legacy_portChris Wilson1-3/+3
2020-10-30drm/amd/display: Clean up GFX9 tiling_flags path.Bas Nieuwenhuizen1-67/+7
2020-10-30drm/amd/display: Expose modifiers.Bas Nieuwenhuizen1-1/+338
2020-10-30drm/amd/display: Add formats for DCC with 2/3 planes.Bas Nieuwenhuizen1-0/+96
2020-10-30drm/amd/display: Set DC options from modifiers.Bas Nieuwenhuizen1-7/+95
2020-10-30drm/amd/display: Refactor surface tiling setup.Bas Nieuwenhuizen1-103/+119
2020-10-30drm/amd/display: Convert tiling_flags to modifiers.Bas Nieuwenhuizen1-0/+123
2020-10-30drm/amd/display: Store tiling_flags in the framebuffer.Bas Nieuwenhuizen4-67/+59
2020-10-30drm/amd/display: Honor the offset for plane 0.Bas Nieuwenhuizen1-5/+9
2020-10-30drm/amd: Init modifier field of helper fb.Bas Nieuwenhuizen1-0/+1
2020-10-30drm/amd/display: Do not silently accept DCC for multiplane formats.Bas Nieuwenhuizen1-1/+1
2020-10-30drm/amd/pm: fix compile warnings about variable used uninitializedEvan Quan1-3/+2
2020-10-30drm/amd/pm: fix compile warning about missing prototype for functionEvan Quan1-1/+1
2020-10-30drm/etnaviv: Add lockdep annotations for context lockGuido Günther1-0/+4
2020-10-30drm/i915: Get rid of ibx_irq_pre_postinstall()Ville Syrjälä1-27/+15
2020-10-30drm/i915: Use GEN3_IRQ_INIT() to init south interrupts in icp+Ville Syrjälä1-6/+2
2020-10-30drm/i915: Enable hpd logic only for ports that are presentVille Syrjälä2-113/+206
2020-10-30drm/i915: Remove per-platform IIR HPD maskingVille Syrjälä2-34/+5
2020-10-30drm/i915: Rename 'tmp_mask'Ville Syrjälä1-10/+12
2020-10-30drm/i915: Don't enable hpd detection logic from irq_postinstall()Ville Syrjälä1-37/+3
2020-10-30drm/i915: Split gen11_hpd_detection_setup() into tc vs. tbt variantsVille Syrjälä1-3/+10
2020-10-30drm/i915: Relocate intel_hpd_{enabled,hotplug}_irqs()Ville Syrjälä1-25/+25
2020-10-30drm/i915: s/tc_port/hpd_pin/ in icp+ TC hotplug bitsVille Syrjälä2-35/+35
2020-10-30drm/i915: s/tc_port/hpd_pin/ in GEN11_{TC,TBT}_HOTPLUG()Ville Syrjälä2-42/+43
2020-10-30drm/i915: s/port/hpd_pin/ for icp+ ddi hpd bitsVille Syrjälä2-36/+36
2020-10-30drm/i915: Introduce GEN8_DE_PORT_HOTPLUG()Ville Syrjälä3-21/+21
2020-10-30drm/i915: Parametrize BXT_DE_PORT_HP_DDI with hpd_pinVille Syrjälä3-18/+19
2020-10-30drm/i915: Use AUX_CH_USBCn for the RKL VBT AUX CH setupVille Syrjälä1-2/+6
2020-10-30drm/i915: Pimp AUX CH namesVille Syrjälä1-3/+10
2020-10-30drm/i915: Introduce AUX_CH_USBCnVille Syrjälä2-3/+58
2020-10-30drm/i915: Give DDI encoders even better namesVille Syrjälä1-2/+25
2020-10-30drm/i915: Add PORT_TCn aliases to enum portVille Syrjälä4-26/+32