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2020-03-03drm/i915/gt: Drop the timeline->mutex as we wait for retirementChris Wilson1-3/+11
2020-03-03drm/i915: Drop vma is-closed assertion on insertChris Wilson1-1/+0
2020-03-03drm/i915/gem: Check that the context wasn't closed during setupChris Wilson2-47/+75
2020-03-03drm/i915/gt: Prevent allocation on a banned contextChris Wilson1-0/+5
2020-03-03drm/i915/gem: Consolidate ctx->engines[] releaseChris Wilson3-92/+105
2020-03-03drm/i915: Polish CHV .load_luts() a bitVille Syrjälä1-7/+4
2020-03-03drm/i915/gvt: only include intel_gvt.h where neededJani Nikula2-2/+1
2020-03-03drm/i915/gvt: make intel_gvt_active internal to intel_gvtJani Nikula2-5/+5
2020-03-03drm/i915/vgpu: improve vgpu abstractionsJani Nikula11-31/+47
2020-03-03drm/i915: Fix kbuild test robot build errorAnshuman Gupta1-9/+9
2020-03-03drm/i915/hdcp: conversion to struct drm_device based logging macros.Ramalingam C1-47/+62
2020-03-03drm/i915: move watermark structs more towards usageJani Nikula3-40/+40
2020-03-03drm/etnaviv: Warn when GPU doesn't idle fast enoughGuido Günther1-1/+4
2020-03-03drm/etnaviv: Ignore MC when checking runtime suspend idlenessGuido Günther1-2/+3
2020-03-03drm/etnaviv: Consider all kwnown idle bits in debugfsGuido Günther1-0/+14
2020-03-03drm/etnaviv: Update idle bitsGuido Günther1-0/+7
2020-03-03drm/etnaviv: Fix typo in commentGuido Günther1-1/+1
2020-03-03drm/etnaviv: rework perfmon query infrastructureChristian Gmeiner1-7/+52
2020-03-03drm/i915/dmc: Use firmware v2.06 for TGLJosé Roberto de Souza1-2/+2
2020-03-03drm/i915/gvt: Fix unnecessary schedule timer when no vGPU exitsZhenyu Wang1-3/+9
2020-03-02drm/i915/huc: update TGL HuC to v7.0.12Daniele Ceraolo Spurio1-1/+1
2020-03-02drm/i915/execlists: Check the sentinel is alone in the ELSPChris Wilson1-0/+21
2020-03-02drm/i915/perf: Reintroduce wait on OA configuration completionChris Wilson2-18/+43
2020-03-02drm/i915/tgl: Add Wa number to WaAllowPMDepthAndInvocationCountAccessFromUMDJosé Roberto de Souza1-0/+1
2020-03-02drm/i915/tgl: Add note about Wa_1409142259José Roberto de Souza1-1/+9
2020-03-02drm/i915/tgl: Fix the Wa number of a fixJosé Roberto de Souza1-1/+1
2020-03-02drm/i915/tgl: Add note about Wa_1607063988José Roberto de Souza1-1/+4
2020-03-02drm/i915/tgl: Add note to Wa_1607297627José Roberto de Souza1-3/+7
2020-03-02drm/i915/tgl: Extend Wa_1606931601 for all steppingsAnusha Srivatsa1-5/+3
2020-03-02drm/i915/tgl: Add Wa_1409085225, Wa_14010229206Matt Atwood2-0/+9
2020-03-02drm/i915/tgl: Implement Wa_1806527549José Roberto de Souza1-0/+3
2020-03-02drm/i915/tgl: Implement Wa_1409804808José Roberto de Souza2-2/+9
2020-03-02drm/i915: Unify the DPLL ref clock frequency trackingImre Deak3-56/+129
2020-03-02drm/i915/hsw: Use the read-out WRPLL/SPLL state instead of reading out againImre Deak1-5/+2
2020-03-02drm/i915/skl, cnl: Split out the WRPLL/LCPLL frequency calculationImre Deak4-145/+140
2020-03-02drm/i915/hsw: Split out the WRPLL, LCPLL, SPLL frequency calculationImre Deak1-35/+56
2020-03-02drm/i915/hsw: Split out the SPLL parameter calculationImre Deak1-14/+22
2020-03-02drm/i915/hsw: Rename the get HDMI/DP DPLL funcs to get WRPLL/LCPLLImre Deak1-5/+5
2020-03-02drm/i915/skl: Parametrize the DPLL ref clock instead of open-coding itImre Deak1-9/+12
2020-03-02drm/i915: Move DPLL frequency calculation to intel_dpll_mgr.cImre Deak5-437/+431
2020-03-02drm/i915/hsw: Use the DPLL ID when calculating DPLL clockImre Deak1-9/+8
2020-03-02drm/i915: Move the DPLL vfunc inits after the func definesImre Deak1-60/+60
2020-03-02drm/i915: Keep the global DPLL state in a DPLL specific structImre Deak6-57/+61
2020-03-02drm/i915: Move DPLL HW readout/sanitize fns to intel_dpll_mgr.cImre Deak3-42/+63
2020-03-02drm/i915: Fix bounds check in intel_get_shared_dpll_id()Imre Deak1-3/+6
2020-03-02drm/i915: Use intel_plane_data_rate for min_cdclk calculationStanislav Lisovskiy3-14/+28
2020-03-02drm/i915: Use a sentinel to terminate the dbuf slice arraysVille Syrjälä1-21/+13
2020-03-02drm/i915: Add missing commas to dbuf tablesVille Syrjälä1-44/+44
2020-03-02drm/i915: Remove garbage WARNsVille Syrjälä1-11/+0
2020-03-02drm/i915: Handle some leftover s/intel_crtc/crtc/Ville Syrjälä1-12/+11
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