aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/gpu
AgeCommit message (Expand)AuthorFilesLines
2020-01-14drm/i915/gen11: Add additional pcode status valuesMatt Roper2-0/+6
2020-01-14drm: Add getfb2 ioctlDaniel Stone3-0/+125
2020-01-14drm/i915/vbt: Rename BDB_LVDS_POWER to BDB_LFP_POWERJosé Roberto de Souza2-2/+2
2020-01-14drm/i915/dp/tgl+: Update combo phy vswing tablesJosé Roberto de Souza1-4/+51
2020-01-14drm/dp_mst: clear time slots for ports invalidWayne Lin1-1/+24
2020-01-14drm/i915/selftests: Add a mock i915_vma to the mock_ringChris Wilson1-1/+16
2020-01-14drm/i915: Make a copy of the ggtt view for slave planeVille Syrjälä1-0/+1
2020-01-14drm/i915/gem: Take local vma references for the parserChris Wilson1-1/+36
2020-01-14drm/amdgpu/debugfs: properly handle runtime pmAlex Deucher2-7/+134
2020-01-14drm/amdgpu/pm: properly handle runtime pmAlex Deucher1-208/+614
2020-01-14drm/amdgpu: add header file for macro SZ_1MFlora Cui1-0/+1
2020-01-14drm/amd/display: remove unnecessary conversion to boolChen Zhou1-1/+1
2020-01-14drm/amd/display: Reorder detect_edp_sink_caps before link settings read.Mario Kleiner1-1/+1
2020-01-14drm/amdgpu/psp: declare navi1x ta firmwareAlex Deucher1-0/+3
2020-01-14drm/amdgpu: Match TC hash settings to DF settings (v2)Joseph Greathouse3-0/+50
2020-01-14drm/amdgpu: add defines for DF and TCP HashingJoseph Greathouse3-0/+17
2020-01-14drm/amdgpu: Create generic DF struct in adevJoseph Greathouse8-49/+90
2020-01-14drm/amd/display: add Pollock IDs, fix Pollock & Dali clk mgr constructMichael Strauss3-5/+15
2020-01-14drm/amdgpu: preserve RSMU UMC index mode stateJohn Clements1-2/+41
2020-01-14drm/amdgpu: disable XGMI TA unload for arcturusJohn Clements1-0/+5
2020-01-14drm/amdgpu: update goldensetting for renoirAaron Liu1-1/+1
2020-01-14drm/amd/powerplay: update SMU12_DRIVER_IF_VERSION to 11Aaron Liu1-1/+6
2020-01-14drm/amdgpu/gmc10: free stolen memory in late_initAlex Deucher1-0/+2
2020-01-14drm/amdgpu/gmc10: remove dead codeAlex Deucher1-9/+0
2020-01-14drm/amdgpu/display: set gpu vm flag for renoirAlex Deucher1-0/+1
2020-01-14drm/amdgpu: enable S/G display on PCO and RV2 (v2)Alex Deucher1-6/+16
2020-01-14drm/amdgpu/display: set gpu vm flag for all asics which support itAlex Deucher1-6/+8
2020-01-14drm/amdgpu/gfx9: remove unused sdma headersAlex Deucher1-9/+0
2020-01-14drm/amd/amdgpu: add missing umc_6_1_2_sh_mask.h header file (v2)Tom St Denis1-0/+91
2020-01-14drm/amdgpu: check sdma ras funcs pointer before accessingHawking Zhang1-2/+6
2020-01-14drm/amdgpu: calculate MCUMC_ADDRT0 per asic's UMC offsetGuchun Chen1-4/+6
2020-01-14drm/amdgpu: add MCUMC_ADDRT0 offset to ip header fileGuchun Chen2-0/+4
2020-01-14drm/amdgpu/powerplay: fix warning in smu_v11_0.cAlex Deucher1-1/+1
2020-01-14drm/amd/powerplay: sw ctf for arcturusKenneth Feng1-2/+3
2020-01-14drm/amdgpu/sriov: workaround on rev_id for Navi12 under sriovTiecheng Zhou1-0/+6
2020-01-14drm/amd/display: Don't disable DP PHY when link loss happensZhan Liu1-1/+0
2020-01-14drm/amdgpu: read sdma edc counter to clear the countersHawking Zhang2-10/+8
2020-01-14drm/amdgpu: add ras_late_init and ras_fini for sdma v4Hawking Zhang2-2/+7
2020-01-14drm/amdgpu: support error reporting for sdma ip blockHawking Zhang1-0/+8
2020-01-14drm/amdgpu: add query_ras_error_count function for sdma v4Hawking Zhang2-0/+169
2020-01-14drm/amdgpu: enable VCN2.5 IP block for ArcturusLeo Liu1-2/+1
2020-01-14drm/amdgpu/vcn2.5: fix PSP FW loading for the second instanceLeo Liu1-2/+2
2020-01-14drm/amdgpu: catch amdgpu_irq_add_id failureNirmoy Das1-0/+4
2020-01-14drm/amd/powerplay: cover the powerplay implementation details V3Evan Quan12-208/+212
2020-01-14drm/amdkfd: Improve function get_sdma_rlc_reg_offset() (v2)Yong Zhao1-21/+45
2020-01-14drm/amdgpu/display: Use u64 divide macro for round up divisionMikita Lipski1-1/+1
2020-01-14drm/i915/guc: Use correct name for last CT fenceMichal Wajdeczko2-2/+2
2020-01-14drm/i915/guc: Update CTB helpers to use CT_ERRORMichal Wajdeczko1-26/+31
2020-01-14drm/i915/guc: Introduce CT_ERRORMichal Wajdeczko1-14/+32
2020-01-14drm/i915/guc: Simpler CT message size calculationMichal Wajdeczko1-9/+9