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2022-05-04drm/amdgpu/mes: implement creating mes process v2Jack Xiao2-0/+80
2022-05-04drm/amdgpu/mes10.1: implement the suspend/resume routineJack Xiao1-2/+16
2022-05-04drm/amdgpu/mes10.1: add delay after mes engine enableJack Xiao1-0/+1
2022-05-04drm/amdgpu/mes10.1: call general mes initializationJack Xiao1-0/+5
2022-05-04drm/amdgpu/mes: relocate status_fence slot allocationJack Xiao2-33/+11
2022-05-04drm/amdgpu/mes: initialize/finalize common mes structure v2Jack Xiao2-0/+76
2022-05-04drm/amdgpu: add mes queue id mask v2Jack Xiao1-0/+1
2022-05-04drm/amdgpu/mes: manage mes doorbell allocationJack Xiao2-0/+134
2022-05-04drm/amdgpu: enable mes kiq N-1 test on sienna cichlidJack Xiao2-50/+184
2022-05-04drm/amdgpu: add mes kiq frontdoor loading supportJack Xiao1-0/+10
2022-05-04drm/amdgpu/mes: add mes kiq callbackJack Xiao1-0/+5
2022-05-04drm/amdgpu: add mes kiq PSP GFX FW typeLikun Gao1-0/+6
2022-05-04drm/amdgpu/sdma5: add mes support for sdma ib testJack Xiao1-14/+36
2022-05-04drm/amdgpu/sdma5: add mes support for sdma ring testJack Xiao1-11/+26
2022-05-04drm/amdgpu/sdma5: add mes queue fence handlingJack Xiao1-0/+18
2022-05-04drm/amdgpu/sdma5: associate mes queue id with fenceJack Xiao1-1/+3
2022-05-04drm/amdgpu/sdma5: initialize sdma mqdJack Xiao1-0/+44
2022-05-04drm/amdgpu/sdma5.2: add mes support for sdma ib testJack Xiao1-14/+36
2022-05-04drm/amdgpu/sdma5.2: add mes support for sdma ring testJack Xiao1-11/+26
2022-05-04drm/amdgpu/sdma5.2: add mes queue fence handlingJack Xiao1-0/+18
2022-05-04drm/amdgpu/sdma5.2: associate mes queue id with fenceJack Xiao1-2/+4
2022-05-04drm/amdgpu/sdma5.2: initialize sdma mqdJack Xiao1-0/+44
2022-05-04drm/amdgpu/sdma: use per-ctx sdma csa address for mes sdma queueJack Xiao1-8/+16
2022-05-04drm/amdgpu: don't use kiq to flush gpu tlb if mes enabledJack Xiao1-1/+1
2022-05-04drm/amdgpu/gfx10: add mes support for gfx ib testJack Xiao1-13/+33
2022-05-04drm/amdgpu/gfx10: add mes queue fence handlingJack Xiao1-20/+40
2022-05-04drm/amdgpu/mes: extend mes framework to support multiple mes pipesJack Xiao2-101/+149
2022-05-04drm/amdgpu: allocate doorbell index for mes kiqJack Xiao3-4/+8
2022-05-04drm/amdgpu: add mes_kiq module parameter v2Jack Xiao3-2/+19
2022-05-04drm/amdgpu: update mes process/gang/queue definitionsJack Xiao1-0/+59
2022-05-04drm/amdgpu: use the whole doorbell space for mesJack Xiao1-13/+19
2022-05-04drm/amdgpu/gmc10: skip emitting pasid mapping packetJack Xiao1-0/+4
2022-05-04drm/amdgpu/gfx10: use INVALIDATE_TLBS to invalidate TLBs v2Jack Xiao1-7/+20
2022-05-04drm/amdgpu/gfx10: inherit vmid from mqdJack Xiao1-0/+8
2022-05-04drm/amdgpu/gfx10: associate mes queue id with fence v2Jack Xiao2-1/+4
2022-05-04drm/amdgpu/gfx10: use per ctx CSA for de metadataJack Xiao1-11/+28
2022-05-04drm/amdgpu/gfx10: use per ctx CSA for ce metadataJack Xiao1-9/+19
2022-05-04drm/amdgpu/gfx10: implement mqd functions of gfx/compute eng v2Jack Xiao1-55/+56
2022-05-04drm/amdgpu: assign the cpu/gpu address of fence from ringJack Xiao1-2/+2
2022-05-04drm/amdgpu: initialize/finalize the ring for mes queueJack Xiao1-41/+104
2022-05-04drm/amdgpu: use ring structure to access rptr/wptr v2Jack Xiao21-145/+128
2022-05-04drm/amdgpu: define ring structure to access rptr/wptr/fenceJack Xiao1-0/+6
2022-05-04drm/amdgpu: add mes ctx data in amdgpu_ringJack Xiao1-0/+5
2022-05-04drm/amdgpu: add the per-context meta data v3Jack Xiao3-0/+128
2022-05-04drm/amdgpu: add helper function to initialize mqd from ring v4Jack Xiao2-0/+50
2022-05-04drm/amdgpu: define MQD abstract layer for hw ipJack Xiao1-0/+21
2022-05-04drm/amdgpu: add imu fw structureLikun Gao1-0/+10
2022-05-04drm/amdgpu: add rlc TOC header file for soc21 (v2)Likun Gao1-0/+41
2022-05-04drm/amdgpu: add FGCG supportEvan Quan2-0/+2
2022-05-04drm/amdgpu: support rlc v2_3 ucode structLikun Gao2-1/+16
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