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2022-03-31drm: bridge: icn6211: Set SYS_CTRL_1 to value used in examplesMarek Vasut1-1/+1
2022-03-31drm: bridge: icn6211: Disable DPI color swapMarek Vasut1-0/+1
2022-03-31drm: bridge: icn6211: Use DSI burst mode without EoT and with LP command modeMarek Vasut1-1/+2
2022-03-31drm: bridge: icn6211: Add generic DSI-to-DPI PLL configurationMarek Vasut1-3/+86
2022-03-31drm: bridge: icn6211: Add HS/VS/DE polarity handlingMarek Vasut1-1/+15
2022-03-31drm: bridge: icn6211: Fix HFP_HSW_HBP_HI and HFP_MIN handlingMarek Vasut1-7/+16
2022-03-31drm: bridge: icn6211: Fix register layoutMarek Vasut1-17/+117
2022-03-31drm: exynos: dsi: Switch to atomic funcsJagan Teki1-9/+16
2022-03-31drm: exynos: dsi: Convert to bridge driverJagan Teki1-43/+45
2022-03-31drm: exynos: dsi: Use drm panel_bridge APIJagan Teki1-134/+23
2022-03-31exynos: drm: dsi: Attach in_bridge in MIC driverJagan Teki2-15/+22
2022-03-31drm: bridge: panel: Reset the connector state pointerJagan Teki1-0/+3
2022-03-31drm: bridge: tc358764: Use drm panel_bridge APIJagan Teki1-98/+6
2022-03-31drm/bridge: tc358767: Add DSI-to-DPI mode supportMarek Vasut2-11/+348
2022-03-31drm/bridge: tc358767: Split tc_set_video_mode() into common and (e)DP partMarek Vasut1-27/+38
2022-03-31drm/bridge: tc358767: Detect bridge mode from connected endpoints in DTMarek Vasut1-1/+45
2022-03-31drm/bridge: tc358767: Move bridge ops setup into tc_probe_edp_bridge_endpoint()Marek Vasut1-5/+5
2022-03-31drm/bridge: tc358767: Wrap (e)DP aux I2C registration into tc_aux_link_setup()Marek Vasut1-6/+6
2022-03-31drm/bridge: tc358767: Move (e)DP bridge endpoint parsing into dedicated functionMarek Vasut1-9/+21
2022-03-31drm/bridge: tc358767: Implement atomic_check callbackMarek Vasut1-0/+26
2022-03-31drm/bridge: tc358767: Convert to atomic opsMarek Vasut1-4/+11
2022-03-31drm/bridge: tc358767: Change tc_ prefix to tc_edp_ for (e)DP specific functionsMarek Vasut1-19/+20
2022-03-31drm/bridge: adv7511: clean up CEC adapter when probe failsLucas Stach1-0/+1
2022-03-31drm/bridge: anx7625: add missing destroy_workqueue() in anx7625_i2c_probe()Yang Yingliang1-2/+2
2022-03-31drm/i915: Allow static DRRS on LVDSVille Syrjälä1-1/+2
2022-03-31drm/i915: Allow static DRRS on all eDP portsVille Syrjälä1-34/+20
2022-03-31drm/i915: Move intel_drrs_compute_config() into intel_dp.cVille Syrjälä3-60/+56
2022-03-31drm/i915: Allow higher refresh rate alternate fixed modesVille Syrjälä1-11/+11
2022-03-31drm/i915: Allow an arbitrary number of downclock modesVille Syrjälä1-30/+12
2022-03-31drm/i915: Stop duplicating the EDID fixed/downclock modesVille Syrjälä1-33/+29
2022-03-31drm/i915: Combine the EDID fixed_mode+downclock_mode lookup into oneVille Syrjälä5-10/+14
2022-03-31drm/i915: Nuke intel_drrs_init()Ville Syrjälä4-26/+7
2022-03-31drm/i915: Refactor non-EDID fixed mode duplicationVille Syrjälä1-36/+30
2022-03-31drm/i915: Put fixed modes directly onto the panel's fixed_modes listVille Syrjälä10-118/+82
2022-03-31drm/i915: Extract intel_edp_has_drrs()Ville Syrjälä2-25/+34
2022-04-01drm/i915/display: Add HAS_MBUS_JOININGJosé Roberto de Souza2-3/+5
2022-04-01drm/i915/dmc: split out dmc registers to a separate fileJani Nikula4-21/+32
2022-04-01drm/i915/dmc: hide DMC version macrosJani Nikula2-4/+4
2022-04-01drm/i915/dmc: abstract GPU error state dumpJani Nikula4-9/+25
2022-03-31drm/i915: Handle the DG2 max bw properlyVinod Govindapillai1-10/+15
2022-03-31drm/edid: fix invalid EDID extension block filteringJani Nikula1-3/+3
2022-03-31drm/vc4: Implement atomic_print_state for HVS channel stateMaxime Ripard1-0/+17
2022-03-31drm/vc4: Constify private state accessorsMaxime Ripard1-3/+4
2022-03-31drm/atomic: Add atomic_print_state to private objectsMaxime Ripard1-0/+16
2022-03-31drm/atomic: Print the state every non-blocking commitMaxime Ripard2-4/+4
2022-03-30drm/panel-edp: Fix AUO B133UAN01 panel idMatthias Kaehlcke1-1/+1
2022-03-30drm/i915/display/adlp: Fix programing of PIPE_MBUS_DBOX_CTLJosé Roberto de Souza3-40/+54
2022-03-30drm/i915/display/adlp: Adjust MBUS DBOX BW and B creditsCaz Yokoyama1-1/+4
2022-03-30drm/i915/display/tgl+: Set default values for all registers in PIPE_MBUS_DBOX_CTLJosé Roberto de Souza2-13/+25
2022-03-30drm/i915/dg2: Add Wa_22014226127José Roberto de Souza2-0/+6
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